Datasheet AD7660 (Analog Devices) - 8

ManufacturerAnalog Devices
Description16-Bit 100 kSPS CMOS Successive Approximation PulSAR ADC with No Missing Codes
Pages / Page21 / 8 — AD7660. DEFINITION OF SPECIFICATIONS. Total Harmonic Distortion (THD). …
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AD7660. DEFINITION OF SPECIFICATIONS. Total Harmonic Distortion (THD). Integral Nonlinearity Error (INL)

AD7660 DEFINITION OF SPECIFICATIONS Total Harmonic Distortion (THD) Integral Nonlinearity Error (INL)

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AD7660 DEFINITION OF SPECIFICATIONS Total Harmonic Distortion (THD) Integral Nonlinearity Error (INL)
THD is the ratio of the rms sum of the first five harmonic Linearity error refers to the deviation of each individual code from components to the rms value of a full-scale input signal and is a line drawn from “negative full scale” through “positive full expressed in decibels. scale.” The point used as negative full scale occurs 1/2 LSB before
Signal-to-Noise Ratio (SNR)
the first code transition. Positive full scale is defined as a level SNR is the ratio of the rms value of the actual input signal to the 1 1/2 LSB beyond the last code transition. The deviation is mea- rms sum of all other spectral components below the Nyquist sured from the middle of each code to the true straight line. frequency, excluding harmonics and dc. The value for SNR is
Differential Nonlinearity Error (DNL)
expressed in decibels. In an ideal ADC, code transitions are 1 LSB apart. Differential
Signal-to-(Noise + Distortion) Ratio (S/[N+D])
nonlinearity is the maximum deviation from this ideal value. It is S/(N+D) is the ratio of the rms value of the actual input signal often specified in terms of resolution for which no missing codes to the rms sum of all other spectral components below the are guaranteed. Nyquist frequency, including harmonics but excluding dc. The
Full-Scale Error
value for S/(N+D) is expressed in decibels. The last transition (from 011 . 10 to 011 . 11 in twos
Aperture Delay
complement coding) should occur for an analog voltage 1 1/2 LSB Aperture delay is a measure of the acquisition performance and below the nominal full scale (2.49994278 V for the 0 V–2.5 V is measured from the falling edge of the CNVST input to when range). The full-scale error is the deviation of the actual level of the input signal is held for a conversion. the last transition from the ideal level.
Transient Response Unipolar Zero Error
The time required for the AD7660 to achieve its rated accuracy The first transition should occur at a level 1/2 LSB above analog after a full-scale step function is applied to its input. ground (19.073 mV for the 0 V–2.5 V range). Unipolar zero error is the deviation of the actual transition from that point.
Overvoltage Recovery
The time required for the ADC to recover to full accuracy after
Spurious-Free Dynamic Range (SFDR)
an analog input signal 150% of full-scale is reduced to 50% of The difference, in decibels (dB), between the rms amplitude of the full-scale value. the input signal and the peak spurious signal.
Effective Number of Bits (ENOB)
ENOB is a measurement of the resolution with a sine wave input. It is related to S/[N+D] by the following formula: ENOB = S/ N + D ( [ ] – .17 )6/ .602 dB and is expressed in bits. REV. E –7– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTIONS DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) Full-Scale Error Unipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal-to-(Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Overvoltage Recovery Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Input Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION VS. THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS Bipolar and Wider Input Ranges Layout Evaluating the AD7660 Performance OUTLINE DIMENSIONS Revision History