Datasheet AD7476, AD7477, AD7478 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 8-Bit, 1 MSPS, Low Power Successive Approximation ADC Which Operates From A Single 2.35 V to 5.25 V Power Supply |
| Pages / Page | 24 / 1 — 1 MSPS, 12-/10-/8-Bit ADCs. in 6-Lead SOT-23. AD7476/AD7477/AD7478. … |
| Revision | F |
| File Format / Size | PDF / 341 Kb |
| Document Language | English |
1 MSPS, 12-/10-/8-Bit ADCs. in 6-Lead SOT-23. AD7476/AD7477/AD7478. FEATURES. FUNCTIONAL BLOCK DIAGRAM
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1 MSPS, 12-/10-/8-Bit ADCs in 6-Lead SOT-23 AD7476/AD7477/AD7478 FEATURES FUNCTIONAL BLOCK DIAGRAM Fast throughput rate: 1 MSPS VDD Specified for VDD of 2.35 V to 5.25 V Low power 12-/10-/8-BIT 3.6 mW at 1 MSPS with 3 V supplies SUCCESSIVE- VIN APPROXIMATION 15 mW at 1 MSPS with 5 V supplies ADC Wide input bandwidth 70 dB SNR at 100 kHz input frequency SCLK Flexible power/serial clock speed management CONTROL LOGIC SDATA No pipeline delays CS High speed serial interface AD7476/AD7477/AD7478 SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible
1 -00
Standby mode: 1 μA maximum
024
GND
01
6-lead SOT-23 package
Figure 1.
APPLICATIONS Battery-powered systems Personal digital assistants Medical instruments Mobile communications Instrumentation and control systems Data acquisition systems High speed modems Optical sensors GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The AD7476/AD7477/AD74781 are, respectively, 12-bit, 10-bit, 1. First 12-/10-/8-Bit ADCs in SOT-23 Packages. and 8-bit, high speed, low power, successive approximation ADCs. The parts operate from a single 2.35 V to 5.25 V power 2. High Throughput with Low Power Consumption. supply and feature throughput rates up to 1 MSPS. Each part 3. Flexible Power/Serial Clock Speed Management. The contains a low noise, wide bandwidth track-and-hold amplifier conversion rate is determined by the serial clock, allowing that can handle input frequencies in excess of 6 MHz. the conversion time to be reduced through the serial clock The conversion process and data acquisition are controlled speed increase. This allows the average power consumption to be reduced while not converting. The parts also feature a using CS and the serial clock, allowing the devices to interface shutdown mode to maximize power efficiency at lower with microprocessors or DSPs. The input signal is sampled on throughput rates. Current consumption is 1 μA maximum the falling edge of CS and the conversion is initiated at this when in shutdown mode. point. There are no pipeline delays associated with these parts. 4. Reference Derived from the Power Supply. The AD7476/AD7477/AD7478 use advanced design techniques to achieve very low power dissipation at high throughput rates. 5. No Pipeline Delay. The parts feature a standard successive- The reference for the parts is taken internally from VDD. This approximation ADC with accurate control of the sampling allows the widest dynamic input range to the ADC. Thus, the instant via a CS input and once-off conversion control. analog input range for the parts are 0 V to VDD. The conversion rate is determined by the SCLK. 1 Protected by U.S. Patent No. 6,681,332.
Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2000–2009 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476 SPECIFICATIONS AD7477 SPECIFICATIONS AD7478 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM Analog Input Digital Input MODES OF OPERATION Normal Mode Power-Down Mode Power-Up Time POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476/AD7477/AD7478 to TMS320C5x/C54x Interface AD7476/AD7477/AD7478 to ADSP-21xx Interface AD7476/AD7477/AD7478 to DSP56xxx Interface AD7476/AD7477/AD7478 to MC68HC16 Interface OUTLINE DIMENSIONS ORDERING GUIDE
1 MSPS, 12-/10-/8-Bit ADCs in 6-Lead SOT-23 AD7476/AD7477/AD7478 FEATURES FUNCTIONAL BLOCK DIAGRAM Fast throughput rate: 1 MSPS VDD Specified for VDD of 2.35 V to 5.25 V Low power 12-/10-/8-BIT 3.6 mW at 1 MSPS with 3 V supplies SUCCESSIVE- VIN APPROXIMATION 15 mW at 1 MSPS with 5 V supplies ADC Wide input bandwidth 70 dB SNR at 100 kHz input frequency SCLK Flexible power/serial clock speed management CONTROL LOGIC SDATA No pipeline delays CS High speed serial interface AD7476/AD7477/AD7478 SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible
1 -00
Standby mode: 1 μA maximum
024
GND
01
6-lead SOT-23 package
Figure 1.
APPLICATIONS Battery-powered systems Personal digital assistants Medical instruments Mobile communications Instrumentation and control systems Data acquisition systems High speed modems Optical sensors GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The AD7476/AD7477/AD74781 are, respectively, 12-bit, 10-bit, 1. First 12-/10-/8-Bit ADCs in SOT-23 Packages. and 8-bit, high speed, low power, successive approximation ADCs. The parts operate from a single 2.35 V to 5.25 V power 2. High Throughput with Low Power Consumption. supply and feature throughput rates up to 1 MSPS. Each part 3. Flexible Power/Serial Clock Speed Management. The contains a low noise, wide bandwidth track-and-hold amplifier conversion rate is determined by the serial clock, allowing that can handle input frequencies in excess of 6 MHz. the conversion time to be reduced through the serial clock The conversion process and data acquisition are controlled speed increase. This allows the average power consumption to be reduced while not converting. The parts also feature a using CS and the serial clock, allowing the devices to interface shutdown mode to maximize power efficiency at lower with microprocessors or DSPs. The input signal is sampled on throughput rates. Current consumption is 1 μA maximum the falling edge of CS and the conversion is initiated at this when in shutdown mode. point. There are no pipeline delays associated with these parts. 4. Reference Derived from the Power Supply. The AD7476/AD7477/AD7478 use advanced design techniques to achieve very low power dissipation at high throughput rates. 5. No Pipeline Delay. The parts feature a standard successive- The reference for the parts is taken internally from VDD. This approximation ADC with accurate control of the sampling allows the widest dynamic input range to the ADC. Thus, the instant via a CS input and once-off conversion control. analog input range for the parts are 0 V to VDD. The conversion rate is determined by the SCLK. 1 Protected by U.S. Patent No. 6,681,332.
Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2000–2009 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476 SPECIFICATIONS AD7477 SPECIFICATIONS AD7478 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM Analog Input Digital Input MODES OF OPERATION Normal Mode Power-Down Mode Power-Up Time POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476/AD7477/AD7478 to TMS320C5x/C54x Interface AD7476/AD7477/AD7478 to ADSP-21xx Interface AD7476/AD7477/AD7478 to DSP56xxx Interface AD7476/AD7477/AD7478 to MC68HC16 Interface OUTLINE DIMENSIONS ORDERING GUIDE
