Datasheet AD7811, AD7812 (Analog Devices) - 8

ManufacturerAnalog Devices
Description10-Bit, 8-Channel, 350 kSPS, Serial A/D Converter
Pages / Page24 / 8 — AD7811/AD7812. Control Register (AD7812). Control Register AD7812. P 1. P …
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AD7811/AD7812. Control Register (AD7812). Control Register AD7812. P 1. P 0. I 8/. D F. I F/. PD1. PD0. Description

AD7811/AD7812 Control Register (AD7812) Control Register AD7812 P 1 P 0 I 8/ D F I F/ PD1 PD0 Description

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AD7811/AD7812 Control Register (AD7812)
The Control Register is a 10-bit-wide, write only register. The Control Register is written to when the AD7812 receives a falling edge on its TFS pin. The AD7812 will maintain the same configuration until a new control byte is written to the part. The control register can be written to at the same time data is being read. This latter feature enhances throughput rates when software control is being used or when the analog input channels are being changed frequently. The power-up default register contents are all zeros; therefore, when the supplies are connected, the AD7812 is powered down by default.
Control Register AD7812 9 0 A0 D P 1 P 0 D V N G A L G S N I 8/ D D F I F/ 2 H C 1 H C 0 H C C T S V N O F E R T X E
A0 This is the package address bit. It is used in conjunction with the package address pin to allow two AD7812s to share the same serial bus. The AD7812 can also share the same serial bus with the AD7811. When a control word is written to the control register of the AD7812 the control word is ignored if the package address bit in the con- trol byte does not match how the package address pin is hardwired. Only the serial port of the device which received the last valid control byte, i.e., the address bit matched the address pin, will attempt to drive the serial bus on the next serial read. When the part powers up this bit is set to 0. PD1, PD0 These bits allow the AD7812 to be fully powered down and powered up. Bit combinations PD1 = PD0 = 0 and PD1 = PD0 = 1 override the automatic power-down decision at the end of conversion. These bits also decide the power-down mode when the AD7812 enters a power-down at the end of a conversion. There are two power-down modes—Full Power-Down and Partial Power-Down. See Power-Down section of this data sheet.
PD1 PD0 Description
0 0 Full Power-Down of the AD7812 0 1 Partial Power-Down at the End of Conversion 1 0 Full Power-Down at the End of Conversion 1 1 Power-Up the AD7812 VIN8/AGND The DIF/SGL bit in the control register must be set to 0 in order to use this option otherwise this bit is ignored. Setting VIN8/AGND to 0 configures the analog inputs of the AD7812 as eight single-ended analog inputs referenced to analog ground (AGND). By setting this bit to 1 the input channels VIN1 to VIN7 are configured as seven pseudo differential channels with respect to VIN8—see Table II. DIF/SGL This bit is used to configure the analog inputs as single ended or pseudo differential pairs. By setting this bit to 0 the analog inputs can be configured as single ended with respect to AGND, or pseudo differential with respect to VIN8 as explained above. Setting this bit to 1 configures the analog input channels as four pseudo differential pairs VIN1/VIN2, VIN3/VIN4, VIN5/VIN6 and VIN7/VIN8—see Table II. CH2, CH1, CH0 These bits are used in conjunction with VIN8/AGND and DIF/SGL to select an analog input channel. Table II shows how the various channel selections are made. CONVST Setting this bit to a logic one initiates a conversion. A conversion is initiated 400 ns after a write to the control register has taken place. This allows a signal to be acquired even if the channel is changed and a conversion initi- ated in the same write operation. The bit is reset after the end of a conversion. EXTREF This bit must be set to a logic one if the user wishes to use an external reference or use VDD as the reference. When the external reference is selected the on-chip reference circuitry powers down and the current consumption is reduced by about 1 mA. –8– REV. B C Document Outline Features General Description Product Highlights Functional Block Diagram Specifications Timing Characteristics Absolute Maximum Ratings ESD Caution Pin Configurations Pin Function Descriptions Terminology Signal to (Noise + Distortion) Ratio Total Harmonic Distortion Peak Harmonic or Spurious Noise Intermodulation Distortion Channel-to-Channel Isolation Relative Accuracy Differential Nonlinearity Offset Error Offset Error Match Gain Error Gain Error Match Track/Hold Acquisition Time Control Register (AD7811) Control Register (AD7812) Circuit Description Converter Operation Typical Connection Diagram Analog Input DC Acquisition Time AC Acquisition Time On-Chip Reference ADC Transfer Function Power-Down Options Power-On-Reset Power-Up Times Mode 2 Full Power-Down (PD1 = 1, PD0 = 0) Mode 2 Partial Power-Down (PD1 = 0, PD0 = 1) Power vs. Throughput Operating Modes Mode 1 Operation (High Speed Sampling) Mode 2 Operation (Automatic Power-Down) Serial Interface Simplifying the Serial Interface Microprocessor Interfacing AD7811/AD7812 to PIC16C6x/7x AD7811/AD7812 to MC68HC11 AD7811/AD7812 to 8051