Datasheet AD7811, AD7812 (Analog Devices) - 9

AD7811/AD7812 Table I. AD7811 Channel Configurations VIN4/AGND DIF/SGL CH1 CH0 Description
0 0 0 0 VIN1 Single-Ended with Respect to AGND 0 0 0 1 VIN2 Single-Ended with Respect to AGND 0 0 1 0 VIN3 Single-Ended with Respect to AGND 0 0 1 1 VIN4 Single-Ended with Respect to AGND 1 0 0 0 VIN1 Pseudo Differential with Respect to VIN4 1 0 0 1 VIN2 Pseudo Differential with Respect to VIN4 1 0 1 0 VIN3 Pseudo Differential with Respect to VIN4 X 1 0 0 VIN1(+) Pseudo Differential with Respect to VIN2(–) X 1 0 1 VIN3(+) Pseudo Differential with Respect to VIN4(–) X 1 1 0 Internal Test. SAR Input Equal to VREF/2 X 1 1 1 Internal Test. SAR Input Equal to VREF
Table II. AD7812 Channel Configurations VIN8/AGND DIF/SGL CH2 CH1 CH0 Description
0 0 0 0 0 VIN1 Single-Ended with Respect to AGND 0 0 0 0 1 VIN2 Single-Ended with Respect to AGND 0 0 0 1 0 VIN3 Single-Ended with Respect to AGND 0 0 0 1 1 VIN4 Single-Ended with Respect to AGND 0 0 1 0 0 VIN5 Single-Ended with Respect to AGND 0 0 1 0 1 VIN6 Single-Ended with Respect to AGND 0 0 1 1 0 VIN7 Single-Ended with Respect to AGND 0 0 1 1 1 VIN8 Single-Ended with Respect to AGND 1 0 0 0 0 VIN1 Pseudo Differential with Respect to VIN8 1 0 0 0 1 VIN2 Pseudo Differential with Respect to VIN8 1 0 0 1 0 VIN3 Pseudo Differential with Respect to VIN8 1 0 0 1 1 VIN4 Pseudo Differential with Respect to VIN8 1 0 1 0 0 VIN5 Pseudo Differential with Respect to VIN8 1 0 1 0 1 VIN6 Pseudo Differential with Respect to VIN8 1 0 1 1 0 VIN7 Pseudo Differential with Respect to VIN8 X 1 0 0 0 VIN1(+) Pseudo Differential with Respect to VIN2(–) X 1 0 0 1 VIN3(+) Pseudo Differential with Respect to VIN4(–) X 1 0 1 0 VIN5(+) Pseudo Differential with Respect to VIN6(–) X 1 0 1 1 VIN7(+) Pseudo Differential with Respect to VIN8(–) X 1 1 0 0 Internal Test. SAR Input Equal to VREF/2 X 1 1 0 1 Internal Test. SAR Input Equal to VREF REV. B C –9– Document Outline Features General Description Product Highlights Functional Block Diagram Specifications Timing Characteristics Absolute Maximum Ratings ESD Caution Pin Configurations Pin Function Descriptions Terminology Signal to (Noise + Distortion) Ratio Total Harmonic Distortion Peak Harmonic or Spurious Noise Intermodulation Distortion Channel-to-Channel Isolation Relative Accuracy Differential Nonlinearity Offset Error Offset Error Match Gain Error Gain Error Match Track/Hold Acquisition Time Control Register (AD7811) Control Register (AD7812) Circuit Description Converter Operation Typical Connection Diagram Analog Input DC Acquisition Time AC Acquisition Time On-Chip Reference ADC Transfer Function Power-Down Options Power-On-Reset Power-Up Times Mode 2 Full Power-Down (PD1 = 1, PD0 = 0) Mode 2 Partial Power-Down (PD1 = 0, PD0 = 1) Power vs. Throughput Operating Modes Mode 1 Operation (High Speed Sampling) Mode 2 Operation (Automatic Power-Down) Serial Interface Simplifying the Serial Interface Microprocessor Interfacing AD7811/AD7812 to PIC16C6x/7x AD7811/AD7812 to MC68HC11 AD7811/AD7812 to 8051