Datasheet AD7813 (Analog Devices) - 4

AD7813 TIMING CHARACTERISTICS1, 2 (–40 C to +105 C, unless otherwise noted) Parameter V = 3 V 10% V = 5 V 10% Unit Conditions/Comments DD DD
tPOWER-UP 1.5 1.5 µs (max) Power-Up Time of AD7813 after Rising Edge of CONVST. t1 2.3 2.3 µs (max) Conversion Time. t2 20 20 ns (min) CONVST Pulsewidth. t3 30 30 ns (max) CONVST Falling Edge to BUSY Rising Edge Delay. t4 0 0 ns (min) CS to RD Setup Time. t5 0 0 ns (min) CS Hold Time after RD High. t 3 6 10 10 ns (max) Data Access Time after RD Low. t 3, 4 7 10 10 ns (max) Bus Relinquish Time after RD High. 5 5 ns (min) t8 10 10 ns (min) Minimum Time Between MSB and LSB Reads. t 3 9 50 50 ns (min) Rising Edge of CS or RD to Falling Edge of CONVST Delay. NOTES 1Sample tested to ensure compliance. 2See Figures 12, 13 and 14. 3These numbers are measured with the load circuit of Figure 1. They are defined as the time required for the o/p to cross 0.8 V or 2.4 V for V DD = 5 V ± 10% and 0.4 V or 2 V for VDD = 3 V ± 10%. 4Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t 7, quoted in the Timing Characteristics is the true bus relinquish time of the part and as such is independent of external bus loading capacitances.
ABSOLUTE MAXIMUM RATINGS*
VDD to DGND . –0.3 V to +7 V
200 A IOL
Digital Input Voltage to DGND (CONVST, RD, CS) . –0.3 V, VDD + 0.3 V
TO
Digital Output Voltage to DGND
OUTPUT 1.6V PIN C
(BUSY, DB0–DB7) . –0.3 V, V
L
DD + 0.3 V
50pF
REFIN to AGND . –0.3 V, VDD + 0.3 V Analog Input . –0.3 V, V
200 A I
DD + 0.3 V
OH
Storage Temperature Range . –65°C to +150°C Junction Temperature . 150°C Figure 1. Load Circuit for Digital Output Timing Plastic DIP Package, Power Dissipation . 450 mW Specifications θJA Thermal Impedance . 105°C/W Lead Temperature, (Soldering 10 sec) . 260°C SOIC Package, Power Dissipation . 450 mW
ORDERING GUIDE
θJA Thermal Impedance . 75°C/W Lead Temperature, Soldering
Linearity Package Package
Vapor Phase (60 sec) . 215
Model Error Description Option
°C Infrared (15 sec) . 220°C AD7813YN ±1 LSB Plastic DIP N-16 SSOP Package, Power Dissipation . 450 mW AD7813YR ±1 LSB Small Outline IC R-16A θJA Thermal Impedance . 115°C/W AD7813YRU ± 1 LSB Thin Shrink Small Outline RU-16 Lead Temperature, Soldering (TSSOP) Vapor Phase (60 sec) . 215°C Infrared (15 sec) . 220°C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating condi- tions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although
WARNING!
the AD7813 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
ESD SENSITIVE DEVICE
recommended to avoid performance degradation or loss of functionality. REV. C –3–