Datasheet AD7858, AD7858L (Analog Devices) - 6

AD7858/AD7858L ABSOLUTE MAXIMUM RATINGS1
SOIC, SSOP Package, Power Dissipation . 450 mW (T θ A = +25°C unless otherwise noted) JA Thermal Impedance . 75°C/W (SOIC) 115°C/W (SSOP) θ AV JC Thermal Impedance . 25°C/W (SOIC) 35°C/W (SSOP) DD to AGND . –0.3 V to +7 V DV Lead Temperature, Soldering DD to DGND . –0.3 V to +7 V AV Vapor Phase (60 sec) . +215°C DD to DVDD . –0.3 V to +0.3 V Analog Input Voltage to AGND . –0.3 V to AV Infrared (15 sec) . +220°C DD + 0.3 V Digital Input Voltage to DGND . –0.3 V to DV NOTES DD + 0.3 V 1 Digital Output Voltage to DGND . –0.3 V to DV Stresses above those listed under Absolute Maximum Ratings may cause perma- DD + 0.3 V nent damage to the device. This is a stress rating only; functional operation of the REFIN/REFOUT to AGND . –0.3 V to AVDD + 0.3 V device at these or any other conditions above those listed in the operational Input Current to Any Pin Except Supplies2 . ± 10 mA sections of this specification is not implied. Exposure to absolute maximum rating Operating Temperature Range conditions for extended periods may affect device reliability. Commercial (A, B Versions) . –40°C to +85°C 2Transient currents of up to 100 mA will not cause SCR latch-up. Storage Temperature Range . –65°C to +150°C Junction Temperature . +150°C Plastic DIP Package, Power Dissipation . 450 mW θJA Thermal Impedance . 105°C/W θJC Thermal Impedance . 34.7°C/W Lead Temperature, (Soldering, 10 sec) . +260°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although
WARNING!
the AD7858/AD7858L features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
ESD SENSITIVE DEVICE
are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE PIN CONFIGURATIONS DIP, SOIC, AND SSOP Linearity Power Error Dissipation Package Model (LSB)1 (mW) Options2 CONVST 1 24 SYNC
AD7858AN ±1 20 N-24
BUSY 2 23 SCLK
AD7858BN ±1/2 20 N-24
SLEEP 3 22 CLKIN
AD7858LAN3 ±1 6.85 N-24
REFIN/REFOUT 4 21 DIN AD7858/ AV
AD7858LBN3 ±1 6.85 N-24
DD 5 20 AD7858L DOUT
AD7858AR ±1 20 R-24
AGND 6 19 TOP VIEW DGND (Not to Scale)
AD7858BR ±1/2 20 R-24
C 7 REF1 18 DVDD
AD7858LAR3 ±1 6.85 R-24
C 8 REF2 17 CAL
AD7858LBR3 ±1 6.85 R-24
AIN1 9 16 AIN8
AD7858LARS3 ±1 6.85 RS-24
AIN2 10 15 AIN7 AIN3
EVAL-AD7858CB4
11 14 AIN6
EVAL-CONTROL BOARD5
AIN4 12 13 AIN5
NOTES 1Linearity error here refers to integral linearity error. 2N = Plastic DIP; R = SOIC; RS = SSOP. 3L signifies the low-power version. 4This can be used as a stand-alone evaluation board or in conjunction with the EVAL- CONTROL BOARD for evaluation/demonstration purposes. 5This board is a complete unit allowing a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators. –6– REV. B