Datasheet AD7821 (Analog Devices) - 5

AD7821 ABSOLUTE MAXIMUM RATINGS*
Industrial (B Version) . –40°C to +85°C VDD to GND . –0.3 V, + 7 V Extended (T Version) . –55°C to +125°C VSS to GND . +0.3 V, + 7 V Storage Temperature Range . –65°C to +150°C Digital Input Voltage to GND Lead Temperature (Soldering, 10 sec) . +300°C (Pins 6–8, 13) . –0.3 V, VDD + 0.3 V Power Dissipation (Any Package) to +75°C . 450 mW Digital Output Voltage to GND Derates above +75°C by . 6 mW/°C (Pins 2–5, 9, 14–18) . –0.3 V, VDD + 0.3 V *Stresses above those listed under “Absolute Maximum Ratings” may cause VREF(+) to GND . VSS – 0.3 V, VDD + 0.3 V permanent damage to the device. This is a stress rating only and functional V operation of the device at these or any other conditions above those indicated in the REF(–) to GND . VSS – 0.3 V, VDD + 0.3 V V operational sections of this specification is not implied. Exposure to absolute IN to GND . VSS – 0.3 V, VDD + 0.3 V maximum rating conditions for extended periods may affect device reliability. Operating Temperature Range Commercial (K Version) . –40°C to +85°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection.
WARNING!
Although the AD7821 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATIONS DIP AND SOIC LCCC PLCC PIN FUNCTION DESCRIPTIONS Pin Mnemonic Description
1 VIN Analog Input: Range VREF(–) ≤ VIN ≤ VREF(+) 2 DB0 Three-State Data Output (LSB) 3–5 DB1–DB3 Three-State Data Outputs 6 WR/RDY WRITE control input/READY status output. See Digital Interface section. 7 MODE Mode Selection Input. It determines whether the device operates in the WR-RD or RD mode. This input is internally pulled low through a 50 µA current source. See Digital Interface section. 8 RD READ Input. RD must be low to access data from the part. See Digital Interface section. 9 INT INTERRUPT Output. INT going low indicates that the conversion is complete. INT returns high on the rising edge of CS or RD. See Digital Interface section. 10 GND Ground 11 VREF(–) Lower limit of reference span. Range: VSS ≤ VREF(–) ≤ VREF(+). 12 VREF(+) Upper limit of reference span. Range: VREF(–) < VREF(+) ≤ VDD. 13 CS Chip Select Input. The device is selected when this input is low. 14–16 DB4–DB6 Three-State Data Outputs 17 DB7 Three-State Data Output (MSB) 18 OFL Overflow Output. If the analog input is higher than (VREF(+) – 1/2 LSB), OFL will be low at the end of conversion. It is a non-three-state output which can be used to cascade two or more devices to increase resolution. 19 VSS Negative Supply Voltage VSS = 0 V; Unipolar Operation VSS = –5 V; Bipolar Operation 20 VDD Positive Supply Voltage, +5 V –4– REV. B Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS Test Circuits ORDERING GUIDE ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS PIN FUNCTION DESCRIPTIONS TERMINOLOGY LEAST SIGNIFICANT BIT (LSB) TOTAL UNADJUSTED ERROR SLEW RATE TOTAL HARMONIC DISTORTION INTERMODULATION DISTORTION SIGNAL-TO-NOISE RATIO PEAK HARMONIC OR SPURIOUS NOISE Typical Performance Characteristics CIRCUIT INFORMATION BASIC DESCRIPTION OPERATING SEQUENCE REFERENCE AND INPUT INPUT CURRENT INPUT TRANSIENTS INHERENT TRACK-AND-HOLD SINUSOIDAL INPUTS DIGITAL SIGNAL PROCESSING APPLICATIONS SIGNAL-TO-NOISE RATIO AND DISTORTION EFFECTIVE NUMBER OF BITS INTERMODULATION DISTORTION HISTOGRAM PLOT DIGITAL INTERFACE RD Mode (MODE = 0) WR-RD Mode (MODE = 1) MICROPROCESSOR INTERFACING AD7821 – 68008 INTERFACE AD7821 – 8088 INTERFACE AD7821 – TMS32010 INTERFACE AD7821 – 8051 INTERFACE APPLYING THE AD7821 UNIPOLAR OPERATION BIPOLAR OPERATION 16-CHANNEL TELECOM A/D CONVERTER SIMULTANEOUS SAMPLING ADCS OUTLINE DIMENSIONS Revision History