Datasheet AD8421 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 3 nV /√Hz, Low Power Instrumentation Amplifier |
| Pages / Page | 29 / 10 — Data Sheet. AD8421. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. –IN. … |
| File Format / Size | PDF / 682 Kb |
| Document Language | English |
Data Sheet. AD8421. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. –IN. +VS. RG 2. VOUT. RG 3. REF. +IN. –VS. TOP VIEW. (Not to Scale)
Text Version of Document
Data Sheet AD8421 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD8421 –IN 1 8 +VS RG 2 7 VOUT RG 3 6 REF +IN 4 5 –VS
2 00
TOP VIEW (Not to Scale)
123- 10 Figure 3. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 −IN Negative Input Terminal. 2, 3 RG Gain Setting Terminals. Place resistor across the RG pins to set the gain. G = 1 + (9.9 kΩ/RG). 4 +IN Positive Input Terminal. 5 −VS Negative Power Supply Terminal. 6 REF Reference Voltage Terminal. Drive this terminal with a low impedance voltage source to level shift the output. 7 VOUT Output Terminal. 8 +VS Positive Power Supply Terminal. Rev. 0 | Page 9 of 28 Document Outline FEATURES APPLICATIONS PIN CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AR AND BR GRADES ARM AND BRM GRADES ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION RG Power Dissipation REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT VOLTAGES BEYOND THE SUPPLY RAILS Input Voltages Beyond the Maximum Ratings RADIO FREQUENCY INTERFERENCE (RFI) CALCULATING THE NOISE OF THE INPUT STAGE Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT CONFIGURATION DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE
2 00
TOP VIEW (Not to Scale)
123- 10 Figure 3. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 −IN Negative Input Terminal. 2, 3 RG Gain Setting Terminals. Place resistor across the RG pins to set the gain. G = 1 + (9.9 kΩ/RG). 4 +IN Positive Input Terminal. 5 −VS Negative Power Supply Terminal. 6 REF Reference Voltage Terminal. Drive this terminal with a low impedance voltage source to level shift the output. 7 VOUT Output Terminal. 8 +VS Positive Power Supply Terminal. Rev. 0 | Page 9 of 28 Document Outline FEATURES APPLICATIONS PIN CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AR AND BR GRADES ARM AND BRM GRADES ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION RG Power Dissipation REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT VOLTAGES BEYOND THE SUPPLY RAILS Input Voltages Beyond the Maximum Ratings RADIO FREQUENCY INTERFERENCE (RFI) CALCULATING THE NOISE OF THE INPUT STAGE Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT CONFIGURATION DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE
