Datasheet MCP4801, MCP4811, MCP4821 (Microchip) - 3

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MCP4801/4811/4821 1.0 ELECTRICAL † Notice:
Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
CHARACTERISTICS
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
Absolute Maximum Ratings †
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods VDD ... 6.5V may affect device reliability. All inputs and outputs ...VSS – 0.3V to VDD + 0.3V Current at Input Pins ..±2 mA Current at Supply Pins ...±50 mA Current at Output Pins ...±25 mA Storage temperature ...-65°C to +150°C Ambient temp. with power applied ..-55°C to +125°C ESD protection on all pins  4 kV (HBM), 400V (MM) Maximum Junction Temperature (TJ). ...+150°C
ELECTRICAL CHARACTERISTICS Electrical Specifications:
Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = 2.048V, Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF, TA = -40 to +85°C. Typical values are at +25°C.
Parameters Sym Min Typ Max Units Conditions Power Requirements
Operating Voltage VDD 2.7 — 5.5 Operating Current IDD — 330 400 µA All digital inputs are grounded, analog output (VOUT) is unloaded. Code = 000h Hardware Shutdown Current ISHDN — 0.3 2 µA POR circuit is turned off Software Shutdown Current ISHDN_SW — 3.3 6 µA POR circuit remains turned on Power-on Reset Threshold VPOR — 2.0 — V
DC Accuracy MCP4801
Resolution n 8 — — Bits INL Error INL -1 ±0.125 1 LSb DNL DNL -0.5 ±0.1 +0.5 LSb
Note 1 MCP4811
Resolution n 10 — — Bits INL Error INL -3.5 ±0.5 3.5 LSb DNL DNL -0.5 ±0.1 +0.5 LSb
Note 1 MCP4821
Resolution n 12 — — Bits INL Error INL -12 ±2 12 LSb DNL DNL -0.75 ±0.2 +0.75 LSb
Note 1
Offset Error VOS -1 ±0.02 1 % of FSR Code = 0x000h Offset Error Temperature — 0.16 — ppm/°C -45°C to +25°C Coefficient VOS/°C — -0.44 — ppm/°C +25°C to +85°C Gain Error gE -2 -0.10 2 % of FSR Code = 0xFFFh, not including offset error Gain Error Temperature G/°C — -3 — ppm/°C Coefficient
Note 1:
Guaranteed monotonic by design over all codes.
2:
This parameter is ensured by design, and not 100% tested.  2010 Microchip Technology Inc. DS22244B-page 3 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: SPI Input Timing Data. 2.0 Typical Performance Curves FIGURE 2-1: DNL vs. Code (MCP4821). FIGURE 2-2: DNL vs. Code and Temperature (MCP4821). FIGURE 2-3: Absolute DNL vs. Temperature (MCP4821). FIGURE 2-4: INL vs. Code and Temperature (MCP4821). FIGURE 2-5: Absolute INL vs. Temperature (MCP4821). FIGURE 2-6: INL vs. Code (MCP4821). FIGURE 2-7: DNL vs. Code and Temperature (MCP4811). FIGURE 2-8: INL vs. Code and Temperature (MCP4811). FIGURE 2-9: DNL vs. Code and Temperature (MCP4801). FIGURE 2-10: INL vs. Code and Temperature (MCP4801). FIGURE 2-11: Full-Scale VOUT vs. Ambient Temperature and VDD. Gain = 1x. FIGURE 2-12: Full-Scale VOUT vs. Ambient Temperature and VDD. Gain = 2x. FIGURE 2-13: Output Noise Voltage Density (VREF Noise Density) vs. Frequency. Gain = 1x. FIGURE 2-14: Output Noise Voltage (VREF Noise Voltage) vs. Bandwidth. Gain = 2x. FIGURE 2-15: IDD vs. Temperature and VDD. FIGURE 2-16: IDD Histogram (VDD = 2.7V). FIGURE 2-17: IDD Histogram (VDD = 5.0V). FIGURE 2-18: Hardware Shutdown Current vs. Temperature and VDD. FIGURE 2-19: Software Shutdown Current vs. Temperature and VDD. FIGURE 2-20: Offset Error vs. Temperature and VDD. FIGURE 2-21: Gain Error vs. Temperature and VDD. FIGURE 2-22: VIN High Threshold vs. Temperature and VDD. FIGURE 2-23: VIN Low Threshold vs. Temperature and VDD. FIGURE 2-24: Input Hysteresis vs. Temperature and VDD. FIGURE 2-25: VOUT High Limit vs.Temperature and VDD. FIGURE 2-26: VOUT Low Limit vs. Temperature and VDD. FIGURE 2-27: IOUT High Short vs. Temperature and VDD. FIGURE 2-28: IOUT vs. VOUT. Gain = 2x. FIGURE 2-29: VOUT Rise Time. FIGURE 2-30: VOUT Fall Time. FIGURE 2-31: VOUT Rise Time. FIGURE 2-32: VOUT Rise Time. FIGURE 2-33: VOUT Rise Time Exit Shutdown. FIGURE 2-34: PSRR vs. Frequency. 3.0 Pin descriptions TABLE 3-1: Pin Function Table for MCP4801/4811/4821 3.1 Supply Voltage Pins (VDD, VSS) 3.2 Chip Select (CS) 3.3 Serial Clock Input (SCK) 3.4 Serial Data Input (SDI) 3.5 Latch DAC Input (LDAC) 3.6 Analog Output (VOUT) 3.7 Exposed Thermal Pad (EP) 4.0 General Overview TABLE 4-1: LSb of each device FIGURE 4-1: Example for INL Error. FIGURE 4-2: Example for DNL Error. 4.1 Circuit Descriptions FIGURE 4-3: Typical Transient Response. FIGURE 4-4: Output Stage for Shutdown Mode. 5.0 Serial Interface 5.1 Overview 5.2 Write Command FIGURE 5-1: Write Command for MCP4821 (12-bit DAC). FIGURE 5-2: Write Command for MCP4811 (10-bit DAC). FIGURE 5-3: Write Command for MCP4801 (8-bit DAC). 6.0 Typical Applications 6.1 Digital Interface 6.2 Power Supply Considerations 6.3 Output Noise Considerations FIGURE 6-1: Typical Connection Diagram. 6.4 Layout Considerations 6.5 Single-Supply Operation 6.6 Bipolar Operation 6.7 Selectable Gain and Offset Bipolar Voltage Output 6.8 Designing a Double-Precision DAC 6.9 Building Programmable Current Source 7.0 Development support 7.1 Evaluation & Demonstration Boards 8.0 Packaging Information 8.1 Package Marking Information Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Kokomo Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service