Datasheet MCP4901, MCP4911, MCP4921 (Microchip) - 7

ManufacturerMicrochip
Description8/10/12-Bit Voltage Output Digital-to-Analog Converter with SPI Interface
Pages / Page50 / 7 — MCP4901/4911/4921. AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS). …
Revision04-15-2010
File Format / SizePDF / 3.4 Mb
Document LanguageEnglish

MCP4901/4911/4921. AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS). Electrical Specifications:. Parameters. Sym. Min. Typ. Max. Units

MCP4901/4911/4921 AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS) Electrical Specifications: Parameters Sym Min Typ Max Units

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MCP4901/4911/4921 AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS) Electrical Specifications:
Unless otherwise indicated, VDD= 2.7V – 5.5V, TA= -40 to +125°C. Typical values are at +25°C.
Parameters Sym Min Typ Max Units Conditions
Schmitt Trigger High Level VIH 0.7 VDD — — V Input Voltage (All digital input pins) Schmitt Trigger Low Level Input VIL — — 0.2 VDD V Voltage (All digital input pins) Hysteresis of Schmitt Trigger VHYS — 0.05 VDD — Inputs Input Leakage Current ILEAKAGE -1 — 1 A LDAC = CS = SDI = SCK = VREF = VDD or VSS Digital Pin Capacitance CIN, — 10 — pF VDD = 5.0V, TA = +25°C, (All inputs/outputs) COUT fCLK = 1 MHz
(Note 1 )
Clock Frequency FCLK — — 20 MHz TA = +25°C
(Note 1 )
Clock High Time tHI 15 — — ns
Note 1
Clock Low Time tLO 15 — — ns
Note 1
CS Fall to First Rising CLK tCSSR 40 — — ns Applies only when CS falls with Edge CLK high
(Note 1)
Data Input Setup Time tSU 15 — — ns
Note 1
Data Input Hold Time tHD 10 — — ns
Note 1
SCK Rise to CS Rise Hold tCHS 15 — — ns
Note 1
Time CS High Time tCSH 15 — — ns
Note 1
LDAC Pulse Width tLD 100 — — ns
Note 1
LDAC Setup Time tLS 40 — — ns
Note 1
SCK Idle Time before CS Fall tIDLE 40 — — ns
Note 1 Note 1:
This parameter is ensured by design and not 100% tested. tCSH CS tIDLE tCSSR t t HI LO tCHS Mode 1,1 SCK Mode 0,0 t t SU HD SI MSB in LSB in LDAC t t LS LD
FIGURE 1-1:
SPI Input Timing Data.  2010 Microchip Technology Inc. DS22248A-page 7 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: SPI Input Timing Data. 2.0 Typical Performance Curves FIGURE 2-1: DNL vs. Code (MCP4921). FIGURE 2-2: DNL vs. Code and Temperature (MCP4921). FIGURE 2-3: DNL vs. Code and VREF, Gain=1 (MCP4921). FIGURE 2-4: Absolute DNL vs. Temperature (MCP4921). FIGURE 2-5: Absolute DNL vs. Voltage Reference (MCP4921). FIGURE 2-6: INL vs. Code and Temperature (MCP4921). FIGURE 2-7: Absolute INL vs. Temperature (MCP4921). FIGURE 2-8: Absolute INL vs. VREF (MCP4921). FIGURE 2-9: INL vs. Code and VREF (MCP4921). FIGURE 2-10: INL vs. Code (MCP4921). FIGURE 2-11: DNL vs. Code and Temperature (MCP4911). FIGURE 2-12: INL vs. Code and Temperature (MCP4911). FIGURE 2-13: DNL vs. Code and Temperature (MCP4901). FIGURE 2-14: INL vs. Code and Temperature (MCP4901). FIGURE 2-15: IDD vs. Temperature and VDD. FIGURE 2-16: IDD Histogram (VDD = 2.7V). FIGURE 2-17: IDD Histogram (VDD = 5.0V). FIGURE 2-18: Shutdown Current vs. Temperature and VDD. FIGURE 2-19: Offset Error vs.Temperature and VDD. FIGURE 2-20: Gain Error vs. Temperature and VDD. FIGURE 2-21: VIN High Threshold vs. Temperature and VDD. FIGURE 2-22: VIN Low Threshold vs. Temperature and VDD. FIGURE 2-23: Input Hysteresis vs. Temperature and VDD. FIGURE 2-24: VREF Input Impedance vs. Temperature and VDD. FIGURE 2-25: VOUT High Limit vs. Temperature and VDD. FIGURE 2-26: VOUT Low Limit vs. Temperature and VDD. FIGURE 2-27: IOUT High Short vs. Temperature and VDD. FIGURE 2-28: IOUT vs. VOUT. Gain = 1. FIGURE 2-29: VOUT Rise Time FIGURE 2-30: VOUT Fall Time. FIGURE 2-31: VOUT Rise Time FIGURE 2-32: VOUT Rise Time FIGURE 2-33: VOUT Rise Time Exit Shutdown. FIGURE 2-34: PSRR vs. Frequency. FIGURE 2-35: Multiplier Mode Bandwidth. FIGURE 2-36: -3 db Bandwidth vs. Worst Codes. FIGURE 2-37: Phase Shift. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Supply Voltage Pins (VDD, VSS) 3.2 Chip Select (CS) 3.3 Serial Clock Input (SCK) 3.4 Serial Data Input (SDI) 3.5 Latch DAC Input (LDAC) 3.6 Analog Output (VOUT) 3.7 Voltage Reference Input (VREF) 3.8 Exposed Thermal Pad (EP) 4.0 General Overview TABLE 4-1: LSb of each device 4.1 DC Accuracy FIGURE 4-1: Example for INL Error. FIGURE 4-2: Example for DNL Accuracy. 4.2 Circuit Descriptions FIGURE 4-3: Typical Transient Response. FIGURE 4-4: Output Stage for Shutdown Mode. 5.0 Serial Interface 5.1 Overview 5.2 Write Command FIGURE 5-1: Write Command for MCP4921 (12-bit DAC). FIGURE 5-2: Write Command for MCP4911 (10-bit DAC). Note: X are don’t care bits. FIGURE 5-3: Write Command for MCP4901(8-bit DAC). Note: X are don’t care bits. 6.0 Typical Applications 6.1 Digital Interface 6.2 Power Supply Considerations FIGURE 6-1: Typical Connection Diagram. 6.3 Layout Considerations 6.4 Single-Supply Operation 6.5 Bipolar Operation 6.6 Selectable Gain and Offset Bipolar Voltage Output Using DAC Devices 6.7 Designing a Double-Precision DAC 6.8 Building Programmable Current Source 6.9 Using Multiplier Mode 7.0 Development support 7.1 Evaluation & Demonstration Boards 8.0 Packaging Information 8.1 Package Marking Information Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Kokomo Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service