Datasheet TC1320 (Microchip) - 6
| Manufacturer | Microchip |
| Description | 8-Bit Digital-to-Analog Converter with Two-Wire Interface |
| Pages / Page | 16 / 6 — TC1320. 3.0. DETAILED DESCRIPTION. 3.2. Output Amplifier. 3.3. Standby … |
| File Format / Size | PDF / 211 Kb |
| Document Language | English |
TC1320. 3.0. DETAILED DESCRIPTION. 3.2. Output Amplifier. 3.3. Standby Mode. 3.1. Reference Input. TABLE 3-1:. STANDBY MODE OPERATION
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TC1320 3.0 DETAILED DESCRIPTION 3.2 Output Amplifier
The TC1320 is a monolithic 8-bit digital-to-analog con- The TC1320 DAC output is buffered with an internal verter, that is designed to operate from a single supply unity gain rail-to-rail input/output amplifier, with a typical that can range from 2.7V to 5.5V. The DAC consists of slew rate of 0.8V/sec. Maximum full scale transition a data register (DATA), a configuration register settling time is 10sec to within ±1/2LSB when loaded (CONF), and a current output amplifier. The TC1320 with 1k in parallel with 100pF. uses an external reference, which also determines the maximum output voltage.
3.3 Standby Mode
The TC1320 uses a current steering DAC, based on an The TC1320 allows the host to put it into a Low Power array of matched current sources. This current, along a (IDD = 0.5A, typical) Standby mode. In this mode, the precision resistor, converts the contents of the Data D/A conversion is halted. The SMBus port operates Register and VREF into an output voltage, VOUT given normally. Standby mode is enabled by setting the by: SHDN bit in the CONFIG register. The table below V summarizes this operation. OUT = VREF (DATA/256)
3.1 Reference Input TABLE 3-1: STANDBY MODE OPERATION
The reference pin, VREF, is a buffered high-impedance
SHDN Bit Operating Mode
input and because of this, the load regulation of the ref- erence source needs only to be able to tolerate leakage 0 Normal levels of current (less than 1A). VREF accepts a volt- 1 Standby age range from 0 to (VDD – 1.2V). Input capacitance is typically 10pF.
3.4 SMBus Slave Address
The TC1320 is internally programmed to have a default SMBus address value of 1001 000b. Seven other addresses are available by custom order (contact fac- tory). See Figure 3-1 for locating address bits in SMBus protocol.
FIGURE 3-1: SMBus PROTOCOLS
Write 1-Byte Format S Address R/W ACK Command ACK Data ACK P 7-Bits 0 8-Bits 8-Bits Slave Address Command Byte: selects Data Byte: data goes which register you are into the register set writing to. by the command byte. Read 1-Byte Format S Address R/W ACK Command ACK S Address R/W ACK Data NACK P 7-Bits 0 8-Bits 7-Bits 1 8-Bits Slave Address Command Byte: selects Slave Address: repeated Data Byte: reads from which register you are due to change in data the register set by the reading from. flow direction. command byte. Receive 1-Byte Format S Address R/W ACK Data NACK P 7-Bits 1 8-Bits S = START Condition Data Byte: reads data from P = STOP Condition the register commanded by Shaded = Slave Transmission the last Read Byte or Write Byte transmission. DS21386C-page 6 2002-2012 Microchip Technology Inc.
TC1320 3.0 DETAILED DESCRIPTION 3.2 Output Amplifier
The TC1320 is a monolithic 8-bit digital-to-analog con- The TC1320 DAC output is buffered with an internal verter, that is designed to operate from a single supply unity gain rail-to-rail input/output amplifier, with a typical that can range from 2.7V to 5.5V. The DAC consists of slew rate of 0.8V/sec. Maximum full scale transition a data register (DATA), a configuration register settling time is 10sec to within ±1/2LSB when loaded (CONF), and a current output amplifier. The TC1320 with 1k in parallel with 100pF. uses an external reference, which also determines the maximum output voltage.
3.3 Standby Mode
The TC1320 uses a current steering DAC, based on an The TC1320 allows the host to put it into a Low Power array of matched current sources. This current, along a (IDD = 0.5A, typical) Standby mode. In this mode, the precision resistor, converts the contents of the Data D/A conversion is halted. The SMBus port operates Register and VREF into an output voltage, VOUT given normally. Standby mode is enabled by setting the by: SHDN bit in the CONFIG register. The table below V summarizes this operation. OUT = VREF (DATA/256)
3.1 Reference Input TABLE 3-1: STANDBY MODE OPERATION
The reference pin, VREF, is a buffered high-impedance
SHDN Bit Operating Mode
input and because of this, the load regulation of the ref- erence source needs only to be able to tolerate leakage 0 Normal levels of current (less than 1A). VREF accepts a volt- 1 Standby age range from 0 to (VDD – 1.2V). Input capacitance is typically 10pF.
3.4 SMBus Slave Address
The TC1320 is internally programmed to have a default SMBus address value of 1001 000b. Seven other addresses are available by custom order (contact fac- tory). See Figure 3-1 for locating address bits in SMBus protocol.
FIGURE 3-1: SMBus PROTOCOLS
Write 1-Byte Format S Address R/W ACK Command ACK Data ACK P 7-Bits 0 8-Bits 8-Bits Slave Address Command Byte: selects Data Byte: data goes which register you are into the register set writing to. by the command byte. Read 1-Byte Format S Address R/W ACK Command ACK S Address R/W ACK Data NACK P 7-Bits 0 8-Bits 7-Bits 1 8-Bits Slave Address Command Byte: selects Slave Address: repeated Data Byte: reads from which register you are due to change in data the register set by the reading from. flow direction. command byte. Receive 1-Byte Format S Address R/W ACK Data NACK P 7-Bits 1 8-Bits S = START Condition Data Byte: reads data from P = STOP Condition the register commanded by Shaded = Slave Transmission the last Read Byte or Write Byte transmission. DS21386C-page 6 2002-2012 Microchip Technology Inc.
