Datasheet LTC4302-1, LTC4302-2 (Analog Devices) - 3

LTC4302-1/LTC4302-2
ELECTRICAL CHARACTERISTICS The
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denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. VCC = 2.7V to 5.5V (LTC4302-1), VCC = VCC2 = 2.7V to 5.5V (LTC4302-2) unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS General Purpose I/Os
VLOW I/O Logic Low Voltage ISINK = 10mA, VCC = 2.7V ● 0.36 0.8 V VHIGH I/O Logic High Voltage ISOURCE = 200µA, VCC = 2.7V ● 2.4 V ILEAK I/O Leakage Current VI/O = 0V to 5.5V (Note 3) ● ±5 µA VTHRESH Input Threshold Voltage Input Mode ● 0.8 1.5 2.2 V
Rise Time Accelerators
IPULLUP,AC Transient Boosted Pull-Up Current Positive Transition on SDA, SCL, ● 1 2 mA Slew Rate = 0.8V/µs, VCC = 2.7V (Note 4)
Input-Output Connection
VOS Output-Input Offset Voltage 10k to VCC on SDA, SCL Pins (Note 5), ● 0 100 175 mV CIN Digital Input Capacitance (Note 9) 10 pF VOL Output Low Voltage SDA, SCL Pins, ISINK = 3mA ● 0 0.4 V ILEAK Input Leakage Current SDA, SCL Pins, VCC = 0V to 5.5V ● ±5 µA Connection Circuits Inactive
2-Wire Digital Interface Voltage Characteristics
VLTH Logic Threshold Voltage ● 0.3VCC 0.5VCC 0.7VCC V ILEAK Digital Input Leakage VCC = 0V to 5.5V ● ±5 µA VOL Digital Output Low Voltage IPULLUP = 3mA Into SDAIN Pin ● 0.4 V
2-Wire Digital Interface Timing Characteristics (Note 6)
fI2C,MAX I2C Operating Frequency (Note 9) 400 600 kHz tBUF Bus Free Time Between Stop and Start (Note 9) 0.75 1.3 µs Condition tHD,STA Hold Time After (Repeated) Start Condition (Note 9) 45 100 ns tSU,STA Repeated Start Condition Setup Time (Note 9) –30 0 ns tSU,STO Stop Condition Setup Time (Note 9) –30 0 ns tHD,DATI Data Hold Time Input (Note 9) –25 0 ns tHD,DATO Data Hold Time Output 300 600 900 ns tSU,DAT Data Setup Time (Note 9) 50 100 ns tSP Pulse Width of Spikes Suppressed by (Note 9) 50 150 250 ns the Input Filter tf Data Fall Time (Notes 7, 8, 9) 20 + 300 ns 0.1CB
Note 1:
Absolute Maximum Ratings are those values beyond which the life the pull-up resistor and V voltage is shown in the Typical Performance CC of a device may be impaired. Characteristics section.
Note 2:
The ICC tests are performed with the backplane-to-card connection
Note 6:
The specifications in this section illustrate the LTC4302-1/ circuitry activated. LTC4302-2’s compatibility with the I2C Fast Mode, the I2C Standard Mode
Note 3:
When the GPIOs are in open-drain output or input mode, the logic and SMBus specifications. See the Timing Diagram on page 5 for high voltage can be provided by a pull-up supply voltage ranging from illustrations of the timing parameters. 2.2V to 5.5V, independent of the VCC voltage.
Note 7:
CB = total capacitance of one bus line in pF.
Note 4:
IPULLUP,AC varies with temperature and VCC voltage as shown in
Note 8:
The digital interface circuit controls the data fall time only when the Typical Performance Characteristics section. acknowledging or transmitting zeros during a read operation. The input-
Note 5:
The connection circuitry always regulates its output to a higher output connection data and clock outputs meet the fall time specification voltage than its input. The magnitude of this offset voltage as a function of provided that the corresponding inputs meet the fall time specification.
Note 9:
Guaranteed by design. Not subject to test. sn430212 430212fs 3