Datasheet LTC4305 (Analog Devices) - 3
Manufacturer | Analog Devices |
Description | 2-Channel, 2-Wire Bus Multiplexer with Capacitance Buffering |
Pages / Page | 20 / 3 — ELECTRICAL CHARACTERISTICS The. denotes specifications which apply over … |
File Format / Size | PDF / 256 Kb |
Document Language | English |
ELECTRICAL CHARACTERISTICS The. denotes specifications which apply over the full specified temperature
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LTC4305
ELECTRICAL CHARACTERISTICS The
●
denotes specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25
°
C. VCC = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply/Start-Up
VTH EN ENABLE Falling Threshold Voltage ● 0.8 1.0 1.2 V VEN HYST ENABLE Threshold Hysteresis Voltage 60 mV tPHL EN ENABLE Delay, On-Off 60 ns tPLH EN ENABLE Delay, Off-On 20 ns IIN EN ENABLE Input Leakage Current VENABLE = 0V, 5.5V, VCC = 5.5V ● 0.1 ±1 µA VLOW READY READY Pin Logic Low Output Voltage IPULL-UP = 3mA, VCC = 2.7V ● 0.18 0.4 V IOFF READY READY Off State Input Leakage Current VREADY = 0V, 5.5V, VCC = 5.5V ● 0 ±1 µA
ALERT
VALERT(OL) ALERT Output Low Voltage IALERT = 3mA, VCC = 2.7V ● 0.2 0.4 V IOFF, ALERT ALERT Off State Input Leakage Current VALERT = 0V, 5.5V ● 0 ±1 µA IIN, ALERT1–2 ALERT1–ALERT2 Input Current VALERT1–2 = 0V, 5.5V ● 0 ±1 µA VALERT1–2(IN) ALERT1–ALERT2 Pin Input Falling 0.8 1.0 1.2 V Threshold Voltages ● VALERT1–2(HY) ALERT1–ALERT2 Pin Input Threshold 80 mV Hysteresis Voltages
Rise Time Accelerators
VSDA,SCL slew Initial Slew Requirement to Activate SDAIN, SCLIN, SDA1–2, 0.4 0.8 V/µs Rise Time Accelerator Currents SCL1–2 Pins ● VRISE,DC Rise Time Accelerator DC Threshold Voltage SDAIN, SCLIN, SDA1–2, 0.7 0.8 1 V SCL1–2 Pins ● IBOOST Rise Time Accelerator Pull-Up Current SDAIN, SCLIN, SDA1–2, 4 5.5 mA SCL1–2 Pins (Note 3)
Stuck Low Timeout Circuitry
VTIMER(L) Stuck Low Falling Threshold Voltage VCC = 2.7V, 5.5V ● 0.4 0.52 0.64 V VTIMER(HYST) Stuck Low Threshold Hysteresis Voltage 80 mV TTIMER1 Timeout Time #1 TIMSET1,0 = 01 ● 25 30 35 ms TTIMER2 Timeout Time #2 TIMSET1,0 = 10 ● 12.5 15 17.5 ms TTIMER3 Timeout Time #3 TIMSET1,0 = 11 ● 6.25 7.5 8.75 ms
Upstream-Downstream Buffers
VOS,BUF Buffer Offset Voltage RBUS = 10k, VCC = 2.7V, 5.5V (Note 4) ● 25 60 100 mV VOS,UP-BUF Upstream Buffer Offset Voltage VCC = 2.7V, RBUS = 2.7k (Note 4) ● 40 80 120 mV VIN,BUFFER = 0V VCC = 5.5V, RBUS = 2.7k (Note 4) ● 70 110 150 mV VOS,DOWN-BUF Downstream Buffer Offset Voltage VCC = 2.7V, RBUS = 2.7k (Note 4) ● 60 110 160 mV VIN,BUFFER = 0V VCC = 5.5V, RBUS = 2.7k (Note 4) ● 80 140 200 mV VOL Output Low Voltage, VIN,BUFFER = 0V SDA, SCL Pins; ISINK = 4mA, ● 400 mV VCC = 3V, 5.5V VOL Output Low Voltage, VIN,BUFFER = 0.2V SDA, SCL Pins; ISINK = 500µA, ● 320 mV VCC = 2.7V, 5.5V VIL,MAX Buffer Input Logic Low Voltage VCC = 2.7V, 5.5V ● 0.4 0.52 0.64 V VTHSDA,SCL Downstream SDA, SCL Logic Threshold Voltage ● 0.8 1.0 1.2 V ILEAK Input Leakage Current SDA, SCL Pins; ● ±5 µA VCC = 0 to 5.5V; Buffers Inactive 4305f 3