Datasheet LTC4305 (Analog Devices) - 7
Manufacturer | Analog Devices |
Description | 2-Channel, 2-Wire Bus Multiplexer with Capacitance Buffering |
Pages / Page | 20 / 7 — BLOCK DIAGRA |
File Format / Size | PDF / 256 Kb |
Document Language | English |
BLOCK DIAGRA
Model Line for this Datasheet
Text Version of Document
LTC4305
W BLOCK DIAGRA
INACC OUTACC UPSTREAM DOWNSTREAM SLEW RATE SLEW RATE BUFFERS DETECTOR DETECTOR SDAIN 3 13 SDA1 15 SDA2 DOWNSTREAM INACC OUT ACC UPSTREAM 1V THRESHOLD 2 DOWNSTREAM COMPARATORS SLEW RATE SLEW RATE BUFFERS DETECTOR DETECTOR SCLIN 5 12 SCL1 STUCK LOW 0.52V 16 SCL2 COMPARATORS READY 11 FET1 FET2 14 ALERT1 CONN ALERT 1V THRESHOLD FET1 1 ALERT2 COMPARATORS SCLIN + 2 100ns FET2 1.6V/1.52V – GLITCH FILTER AL1-AL2 TIMSET1 STUCK LOW SDAIN + 100ns TIMEOUT 2 ALERT TIMSET0 – GLITCH FILTER CIRCUITRY FET1 TIMEOUT_REAL ALERT LOGIC FET2 TIMEOUT_LATCH VCC 2 CH1CONN-CH2CONN RLIM CONNECTION UVLO 50k CONN_REQ CIRCUITRY C1 2-WIRE 2pF DIGITAL 4 GND INTERFACE FAILCONN_ATTEMPT AND REGISTERS 2 BUS1_LOG-BUS2_LOG 2 AL1-AL2 V 7 + CC 1µs UVLO PORB ADDRESS FILTER 2.5V/2.35V – FIXED BITS “10” 10 ADR2 5 I2C ADDR 5 ENABLE 6 + 1 OF 27 9 ADR1 1.1V/1V – INACC 8 ADR0 OUTACC 4305 BD 4305f 7