Datasheet LTC4305 (Analog Devices) - 10

LTC4305
U OPERATIO
The LTC4305 is a 2-channel 2-wire bus multiplexer/ stuck low. Masters can override this feature by setting the switch with bus buffers to provide capacitive isolation Connection Requirement Bit of register 2 high. With this between the upstream bus and downstream buses. Mas- bit high, the LTC4305 executes connection commands ters on the upstream 2-wire bus (SDAIN and SCLIN) can without regard to the logic states of the downstream command the LTC4305 to neither, either or both of the 2 channels. downstream buses. Masters can also program the LTC4305 Upon receiving the connection command, the Connection to disconnect the upstream bus from the downstream Circuitry shown in the block diagram will activate the buses if the bus is stuck low. Upstream-Downstream Buffers under two conditions:
Undervoltage Lockout (UVLO) and ENABLE
first, the master must be commanding connection to one
Functionality
or more downstream channels, and second, there must be no stuck low condition (see “Stuck Low Timeout Fault” The LTC4305 contains undervoltage lockout circuitry that discussion that follows). If the connection command is maintains all of its SDA, SCL and ALERT pins in high successful, the Upstream-Downstream Buffer circuitry impedance states until the device has sufficient VCC sup- passes signals between the upstream bus and the con- ply voltage to function properly. It also ignores any nected downstream buses. The LTC4305 also turns off its attempts to communicate with it via the 2-wire buses in N-channel MOSFET open-drain pull-down on the READY this condition. When the ENABLE pin voltage is low (below pin, so that READY can be pulled high by its external pull- 0.8V), all control bits are reset to their default high up resistor. impedance states, and the LTC4305 ignores 2-wire bus commands. However, with ENABLE low, the LTC4305 still
Upstream-Downstream Buffers
monitors the ALERT1–ALERT2 pin voltages and pulls the Once the Upstream-Downstream Buffers are activated, ALERT pin low if any of ALERT1–ALERT2 is low. When the functionality of the SDAIN and any connected down- ENABLE is high, devices can read from and write to the stream SDA pins is identical. A low forced on any con- LTC4305. nected SDA pin at any time results in all pins being low.
Connection Circuitry External devices must pull the pin voltages below 0.4V worst-case with respect to the LTC4305’s ground pin to
Masters on the upstream SDAIN/SCLIN bus can write to
ensure proper operation.
The SDA pins enter a logic high the Bus 1 FET State and Bus 2 FET State bits of register 3 state only when all devices on all connected SDA pins to connect to any combination of downstream channels. force a high. The same is true for SCLIN and the connected By default, the Connection Circuitry shown in the block downstream SCL pins. This important feature ensures diagram will only connect to downstream channels whose that clock stretching, clock arbitration and the acknowl- corresponding Bus Logic State bits in register 3 are high edge protocol always work, regardless of the how the at the moment that it receives the connection command. devices in the system are connected to the LTC4305. If the LTC4305 is commanded to connect to multiple channels at once, it will only connect to the channels that The Upstream-Downstream Buffers provide capacitive are high. This prevents the master on the upstream bus isolation between SDAIN/SCLIN and the downstream from connnecting to a downstream channel that may be connected buses. Note that there is no capacitive isolation between connected downstream buses; they are only 4305f 10