Datasheet LTC4314 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Pin-Selectable, 4-Channel, 2-Wire Multiplexer with Bus Buffers |
| Pages / Page | 20 / 9 — APPLICATIONS INFORMATION. Table 1. ACC Control of the Rise Time … |
| File Format / Size | PDF / 207 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. Table 1. ACC Control of the Rise Time Accelerator Current IRTA
Model Line for this Datasheet
Text Version of Document
LTC4314
APPLICATIONS INFORMATION
The LTC4314 is a 1:4 pin selectable I2C multiplexer that current source accelerator mode, the LTC4314 provides provides a high noise margin, capacitance buffering and a 3mA constant current source pull-up. level translation capability on its clock and data pins. Rise
Table 1. ACC Control of the Rise Time Accelerator Current IRTA
time accelerators accelerate rising edges to enable opera-
and Buffer Turn-Off Voltage VIL,RISING
tion at high frequencies with heavy loads. These features
ACC IRTA VRTA(TH) VIL, RISING
are illustrated in the following subsections. Low Strong 0.8V 0.6V Hi-Z 3mA 0.4•VMIN 0.33•VMIN
Rise Time Accelerators and DC Hold-Off Voltage
High None N/A 0.33•VMIN Once the LTC4314 has exited UVLO and a connection has In the strong mode, the LTC4314 sources pull-up current been established between the SDA and SCL inputs and to make the bus rise at 75V/μs (typical). The strong mode outputs, the rise time accelerators on both the input and current is therefore directly proportional to the bus capaci- output sides of the SDA and SCL busses are activated based tance. The LTC4314 is capable of sourcing a maximum of on the state of the ACC pin and the VCC2 supply voltage. 45mA of current in the strong mode. The effect of the rise During positive bus transitions of at least 0.2V/μs, the time accelerator strength is shown in the SDA waveforms in rise time accelerators provide pull-up currents to reduce Figures 1 and 2 for identical bus loads for a single enabled rise time. Enabling the rise time accelerators allows users output channel. The rise time accelerator supplies 3mA and to choose larger bus pull-up resistors, reducing power 10mA of pull-up current (IRTA) respectively in the current consumption and improving logic low noise margins, to source and strong modes for the bus conditions shown design with bus capacitances outside of the I2C specifi ca- in Figures 1 and 2. The rise time accelerator turn-on volt- tion, or switch at a higher clock frequency. The ACC pin age is also lower in the strong mode than in the current sets the turn-off threshold voltage for the buffers, the source mode. For identical bus loading conditions, the turn-on voltage for the rise time accelerators, and the rise busses return high faster in Figure 1 compared to Figure 2 time accelerator pull-up current strength. The ACC func- because of both the higher IRTA and the lower turn-on volt- tionality is shown in Table 1. Set ACC open or high when a age of the rise time accelerator. In each fi gure, note that the high noise margin is required, such as when the LTC4314 input and output rising waveforms are nearly coincident is used in a system having I2C devices with VOL > 0.4V. due to the input and output busses having nearly identical The ACC pin has a resistive divider between VCC and bus current and capacitance. ground to set its voltage to 0.5•VCC if left open. In the CIN = COUT = 200pF CIN = COUT = 200pF RBUS = 10kΩ RBUS = 10kΩ ACC = 0 ACC = OPEN VCC = VCC = 5V VCC = VCC2 = 5V SDAOUT1 SDAOUT1 /DIV 0V /DIV 0V 2V 2V SDAIN SDAIN 0V 0V 500ns/DIV 4314 F01 500ns/DIV 4314 F02
Figure 1. Bus Rising Edge for the Strong Figure 2. Bus Rising Edge for the Accelerator Mode Current Source Accelerator Mode
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APPLICATIONS INFORMATION
The LTC4314 is a 1:4 pin selectable I2C multiplexer that current source accelerator mode, the LTC4314 provides provides a high noise margin, capacitance buffering and a 3mA constant current source pull-up. level translation capability on its clock and data pins. Rise
Table 1. ACC Control of the Rise Time Accelerator Current IRTA
time accelerators accelerate rising edges to enable opera-
and Buffer Turn-Off Voltage VIL,RISING
tion at high frequencies with heavy loads. These features
ACC IRTA VRTA(TH) VIL, RISING
are illustrated in the following subsections. Low Strong 0.8V 0.6V Hi-Z 3mA 0.4•VMIN 0.33•VMIN
Rise Time Accelerators and DC Hold-Off Voltage
High None N/A 0.33•VMIN Once the LTC4314 has exited UVLO and a connection has In the strong mode, the LTC4314 sources pull-up current been established between the SDA and SCL inputs and to make the bus rise at 75V/μs (typical). The strong mode outputs, the rise time accelerators on both the input and current is therefore directly proportional to the bus capaci- output sides of the SDA and SCL busses are activated based tance. The LTC4314 is capable of sourcing a maximum of on the state of the ACC pin and the VCC2 supply voltage. 45mA of current in the strong mode. The effect of the rise During positive bus transitions of at least 0.2V/μs, the time accelerator strength is shown in the SDA waveforms in rise time accelerators provide pull-up currents to reduce Figures 1 and 2 for identical bus loads for a single enabled rise time. Enabling the rise time accelerators allows users output channel. The rise time accelerator supplies 3mA and to choose larger bus pull-up resistors, reducing power 10mA of pull-up current (IRTA) respectively in the current consumption and improving logic low noise margins, to source and strong modes for the bus conditions shown design with bus capacitances outside of the I2C specifi ca- in Figures 1 and 2. The rise time accelerator turn-on volt- tion, or switch at a higher clock frequency. The ACC pin age is also lower in the strong mode than in the current sets the turn-off threshold voltage for the buffers, the source mode. For identical bus loading conditions, the turn-on voltage for the rise time accelerators, and the rise busses return high faster in Figure 1 compared to Figure 2 time accelerator pull-up current strength. The ACC func- because of both the higher IRTA and the lower turn-on volt- tionality is shown in Table 1. Set ACC open or high when a age of the rise time accelerator. In each fi gure, note that the high noise margin is required, such as when the LTC4314 input and output rising waveforms are nearly coincident is used in a system having I2C devices with VOL > 0.4V. due to the input and output busses having nearly identical The ACC pin has a resistive divider between VCC and bus current and capacitance. ground to set its voltage to 0.5•VCC if left open. In the CIN = COUT = 200pF CIN = COUT = 200pF RBUS = 10kΩ RBUS = 10kΩ ACC = 0 ACC = OPEN VCC = VCC = 5V VCC = VCC2 = 5V SDAOUT1 SDAOUT1 /DIV 0V /DIV 0V 2V 2V SDAIN SDAIN 0V 0V 500ns/DIV 4314 F01 500ns/DIV 4314 F02
Figure 1. Bus Rising Edge for the Strong Figure 2. Bus Rising Edge for the Accelerator Mode Current Source Accelerator Mode
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