Datasheet ADXL354, ADXL355 (Analog Devices) - 3

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Data Sheet ADXL354/ADXL355 SPECIFICATIONS ANALOG OUTPUT FOR THE ADXL354
TA = 25°C, VSUPPLY = 3.3 V, x-axis acceleration and y-axis acceleration = 0 g, and z-axis acceleration = 1 g, unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
SENSOR INPUT Each axis Output Full-Scale Range (FSR) ADXL354B, supports two ranges ±2/±4 g ADXL354C, supports two ranges ±2/±8 g Resonant Frequency1 2.4 kHz Nonlinearity ±2 g 0.1 % Cross Axis Sensitivity 1 % SENSITIVITY Ratiometric to V1P8ANA Sensitivity at XOUT, YOUT, ZOUT ±2 g 368 400 432 mV/g ±4 g 184 200 216 mV/g ±8 g 92 100 108 mV/g Sensitivity Change due to Temperature −40°C to +125°C ±0.01 %/°C 0 g OFFSET Each axis, ±2 g 0 g Output for XOUT, YOUT, ZOUT Referred to V1P8ANA/2 −75 ±25 +75 mg 0 g Offset vs. Temperature (X-Axis, Y-Axis, and Z-Axis)2 −40°C to +125°C −0.15 ±0.1 +0.15 mg/°C Repeatability3 X-axis and y-axis ±3.5 mg Z-axis ±9 mg Vibration Rectification Error (VRE)4 ±2 g range, in a 1 g orientation, <0.4 g offset due to 2.5 g rms vibration NOISE DENSITY ±2 g X-Axis, Y-Axis, and Z-Axis 20 µg/√Hz Velocity Random Walk X-axis and y-axis 9 µm/sec/√Hr Z-axis 13 µm/sec/√Hr BANDWIDTH Internal Low-Pass Filter Frequency Fixed frequency, 50% response 1500 Hz attenuation SELF TEST Output Change X-Axis 0.3 g Y-Axis 0.3 g Z-Axis 1.5 g POWER SUPPLY Voltage Range V 5 SUPPLY 2.25 2.5 3.6 V VDDIO V1P8DIG 2.5 3.6 V V1P8ANA, V1P8DIG with Internal Low Dropout VSUPPLY = 0 V 1.62 1.8 1.98 V Regulator (LDO) Bypassed Current Measurement Mode VSUPPLY (LDO Enabled) 150 µA V1P8ANA (LDO Disabled) 138 µA V1P8DIG (LDO Disabled) 12 µA Standby Mode VSUPPLY (LDO Enabled) 21 µA V1P8ANA (LDO Disabled) 7 µA V1P8DIG (LDO Disabled) 10 µA Turn On Time6 2 g range <10 ms Power-off to standby <10 ms Rev. 0 | Page 3 of 42 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ANALOG OUTPUT FOR THE ADXL354 DIGITAL OUTPUT FOR THE ADXL355 SPI DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355 I2C DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ROOT ALLAN VARIANCE (RAV) ADXL355 CHARACTERISTICS THEORY OF OPERATION ANALOG OUTPUT DIGITAL OUTPUT AXES OF ACCELERATION SENSITIVITY POWER SEQUENCING POWER SUPPLY DESCRIPTION VSUPPLY V1P8ANA V1P8DIG VDDIO OVERRANGE PROTECTION SELF TEST FILTER SERIAL COMMUNICATIONS SPI PROTOCOL I2C PROTOCOL READING ACCELERATION OR TEMPERATURE DATA FROM THE INTERFACE FIFO INTERRUPTS DATA_RDY DRDY PIN FIFO_FULL FIFO_OVR ACTIVITY NVM_BUSY EXTERNAL SYNCHRONIZATION AND INTERPOLATION EXT_SYNC = 00—No External Sync or Interpolation EXT_SYNC = 10—External Sync with Interpolation EXT_SYNC = 01—External Sync and External Clock ADXL355 REGISTER MAP REGISTER DEFINITIONS ANALOG DEVICES ID REGISTER Address: 0x00, Reset: 0xAD, Name: DEVID_AD ANALOG DEVICES MEMS ID REGISTER Address: 0x01, Reset: 0x1D, Name: DEVID_MST DEVICE ID REGISTER Address: 0x02, Reset: 0xED, Name: PARTID PRODUCT REVISION ID REGISTER Address: 0x03, Reset: 0x00, Name: REVID STATUS REGISTER Address: 0x04, Reset: 0x00, Name: STATUS FIFO ENTRIES REGISTER Address: 0x05, Reset: 0x00, Name: FIFO_ENTRIES TEMPERATURE DATA REGISTERS Address: 0x06, Reset: 0x00, Name: TEMP2 Address: 0x07, Reset: 0x00, Name: TEMP1 X-AXIS DATA REGISTERS Address: 0x08, Reset: 0x00, Name: XDATA3 Address: 0x09, Reset: 0x00, Name: XDATA2 Address: 0x0A, Reset: 0x00, Name: XDATA1 Y-AXIS DATA REGISTERS Address: 0x0B, Reset: 0x00, Name: YDATA3 Address: 0x0C, Reset: 0x00, Name: YDATA2 Address: 0x0D, Reset: 0x00, Name: YDATA1 Z-AXIS DATA REGISTERS Address: 0x0E, Reset: 0x00, Name: ZDATA3 Address: 0x0F, Reset: 0x00, Name: ZDATA2 Address: 0x10, Reset: 0x00, Name: ZDATA1 FIFO ACCESS REGISTER Address: 0x11, Reset: 0x00, Name: FIFO_DATA X-AXIS OFFSET TRIM REGISTERS Address: 0x1E, Reset: 0x00, Name: OFFSET_X_H Address: 0x1F, Reset: 0x00, Name: OFFSET_X_L Y-AXIS OFFSET TRIM REGISTERS Address: 0x20, Reset: 0x00, Name: OFFSET_Y_H Address: 0x21, Reset: 0x00, Name: OFFSET_Y_L Z-AXIS OFFSET TRIM REGISTERS Address: 0x22, Reset: 0x00, Name: OFFSET_Z_H Address: 0x23, Reset: 0x00, Name: OFFSET_Z_L ACTIVITY ENABLE REGISTER Address: 0x24, Reset: 0x00, Name: ACT_EN ACTIVITY THRESHOLD REGISTERS Address: 0x25, Reset: 0x00, Name: ACT_THRESH_H Address: 0x26, Reset: 0x00, Name: ACT_THRESH_L ACTIVITY COUNT REGISTER Address: 0x27, Reset: 0x01, Name: ACT_COUNT FILTER SETTINGS REGISTER Address: 0x28, Reset: 0x00, Name: Filter FIFO SAMPLES REGISTER Address: 0x29, Reset: 0x60, Name: FIFO_SAMPLES INTERRUPT PIN (INTx) FUNCTION MAP REGISTER Address: 0x2A, Reset: 0x00, Name: INT_MAP DATA SYNCHRONIZATION Address: 0x2B, Reset: 0x00, Name: Sync I2C SPEED, INTERRUPT POLARITY, AND RANGE REGISTER Address: 0x2C, Reset: 0x81, Name: Range POWER CONTROL REGISTER Address: 0x2D, Reset: 0x01, Name: POWER_CTL SELF TEST REGISTER Address: 0x2E, Reset: 0x00, Name: SELF_TEST RESET REGISTER Address: 0x2F, Reset: 0x00, Name: Reset RECOMMENDED SOLDERING PROFILE PCB FOOTPRINT PATTERN PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS BRANDING INFORMATION ORDERING GUIDE