Datasheet ADXL354, ADXL355 (Analog Devices) - 5

Data Sheet ADXL354/ADXL355 Parameter Test Conditions/Comments Min Typ Max Unit
SELF TEST Output Change X-Axis 0.3 g Y-Axis 0.3 g Z-Axis 1.5 g POWER SUPPLY Voltage Range VSUPPLY Operating4 2.25 2.5 3.6 V VDDIO V1P8DIG 2.5 3.6 V V1P8ANA and V1P8DIG with Internal LDO Bypassed VSUPPLY = 0 V 1.62 1.8 1.98 V Current Measurement Mode VSUPPLY (LDO Enabled) 200 µA V1P8ANA (LDO Disabled) 160 µA V1P8DIG (LDO Disabled) 35.5 µA Standby Mode VSUPPLY (LDO Enabled) 21 µA V1P8ANA (LDO Disabled) 7 µA V1P8DIG (LDO Disabled) 10 µA Turn On Time5 2 g range <10 ms Power-off to standby <10 ms TEMPERATURE SENSOR Output at 25°C 1852 LSB Scale Factor −9.05 LSB/°C TEMPERATURE Operating Temperature Range −40 +125 °C 1 The temperature change is −40°C to +25°C or +25°C to +125°C. 2 Repeatability is predicted for a 10 year life and includes shifts due to the HTOL (TA = 150°C, VSUPPLY = 3.6 V, and 1000 hours), temperature cycling (−55°C to +125°C and 1000 cycles), velocity random walk, broadband noise, and temperature hysteresis. 3 The VRE measurement is the shift in dc offset while the device is subject to 2.5 g rms random vibration from 50 Hz to 2 kHz. The DUT is configured for the ±2 g range and an output data rate of 4 kHz. The VRE scales with the range setting. 4 When V1P8ANA and V1P8DIG are generated internally, VSUPPLY is valid. To disable the LDO and drive V1P8ANA and V1P8DIG externally, connect VSUPPLY to VSS. 5 Standby to measurement mode; valid when the output is within 1 mg of final value.
SPI DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355
Note that multifunction pin names may be referenced by their relevant function only.
Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
DC INPUT LEVELS Input Voltage Low Level VIL 0.3 × VDDIO V High Level VIH 0.7 × VDDIO V Input Current Low Level IIL VIN = 0 V −0.1 µA High Level IIH VIN = VDDIO 0.1 µA DC OUTPUT LEVELS Output Voltage Low Level VOL IOL = IOL, MIN 0.2 × VDDIO V High Level VOH IOH = IOH, MAX 0.8 × VDDIO V Output Current Low Level IOL VOL = VOL, MAX −10 mA High Level IOH VOH = VOH, MIN 4 mA Rev. 0 | Page 5 of 42 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ANALOG OUTPUT FOR THE ADXL354 DIGITAL OUTPUT FOR THE ADXL355 SPI DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355 I2C DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ROOT ALLAN VARIANCE (RAV) ADXL355 CHARACTERISTICS THEORY OF OPERATION ANALOG OUTPUT DIGITAL OUTPUT AXES OF ACCELERATION SENSITIVITY POWER SEQUENCING POWER SUPPLY DESCRIPTION VSUPPLY V1P8ANA V1P8DIG VDDIO OVERRANGE PROTECTION SELF TEST FILTER SERIAL COMMUNICATIONS SPI PROTOCOL I2C PROTOCOL READING ACCELERATION OR TEMPERATURE DATA FROM THE INTERFACE FIFO INTERRUPTS DATA_RDY DRDY PIN FIFO_FULL FIFO_OVR ACTIVITY NVM_BUSY EXTERNAL SYNCHRONIZATION AND INTERPOLATION EXT_SYNC = 00—No External Sync or Interpolation EXT_SYNC = 10—External Sync with Interpolation EXT_SYNC = 01—External Sync and External Clock ADXL355 REGISTER MAP REGISTER DEFINITIONS ANALOG DEVICES ID REGISTER Address: 0x00, Reset: 0xAD, Name: DEVID_AD ANALOG DEVICES MEMS ID REGISTER Address: 0x01, Reset: 0x1D, Name: DEVID_MST DEVICE ID REGISTER Address: 0x02, Reset: 0xED, Name: PARTID PRODUCT REVISION ID REGISTER Address: 0x03, Reset: 0x00, Name: REVID STATUS REGISTER Address: 0x04, Reset: 0x00, Name: STATUS FIFO ENTRIES REGISTER Address: 0x05, Reset: 0x00, Name: FIFO_ENTRIES TEMPERATURE DATA REGISTERS Address: 0x06, Reset: 0x00, Name: TEMP2 Address: 0x07, Reset: 0x00, Name: TEMP1 X-AXIS DATA REGISTERS Address: 0x08, Reset: 0x00, Name: XDATA3 Address: 0x09, Reset: 0x00, Name: XDATA2 Address: 0x0A, Reset: 0x00, Name: XDATA1 Y-AXIS DATA REGISTERS Address: 0x0B, Reset: 0x00, Name: YDATA3 Address: 0x0C, Reset: 0x00, Name: YDATA2 Address: 0x0D, Reset: 0x00, Name: YDATA1 Z-AXIS DATA REGISTERS Address: 0x0E, Reset: 0x00, Name: ZDATA3 Address: 0x0F, Reset: 0x00, Name: ZDATA2 Address: 0x10, Reset: 0x00, Name: ZDATA1 FIFO ACCESS REGISTER Address: 0x11, Reset: 0x00, Name: FIFO_DATA X-AXIS OFFSET TRIM REGISTERS Address: 0x1E, Reset: 0x00, Name: OFFSET_X_H Address: 0x1F, Reset: 0x00, Name: OFFSET_X_L Y-AXIS OFFSET TRIM REGISTERS Address: 0x20, Reset: 0x00, Name: OFFSET_Y_H Address: 0x21, Reset: 0x00, Name: OFFSET_Y_L Z-AXIS OFFSET TRIM REGISTERS Address: 0x22, Reset: 0x00, Name: OFFSET_Z_H Address: 0x23, Reset: 0x00, Name: OFFSET_Z_L ACTIVITY ENABLE REGISTER Address: 0x24, Reset: 0x00, Name: ACT_EN ACTIVITY THRESHOLD REGISTERS Address: 0x25, Reset: 0x00, Name: ACT_THRESH_H Address: 0x26, Reset: 0x00, Name: ACT_THRESH_L ACTIVITY COUNT REGISTER Address: 0x27, Reset: 0x01, Name: ACT_COUNT FILTER SETTINGS REGISTER Address: 0x28, Reset: 0x00, Name: Filter FIFO SAMPLES REGISTER Address: 0x29, Reset: 0x60, Name: FIFO_SAMPLES INTERRUPT PIN (INTx) FUNCTION MAP REGISTER Address: 0x2A, Reset: 0x00, Name: INT_MAP DATA SYNCHRONIZATION Address: 0x2B, Reset: 0x00, Name: Sync I2C SPEED, INTERRUPT POLARITY, AND RANGE REGISTER Address: 0x2C, Reset: 0x81, Name: Range POWER CONTROL REGISTER Address: 0x2D, Reset: 0x01, Name: POWER_CTL SELF TEST REGISTER Address: 0x2E, Reset: 0x00, Name: SELF_TEST RESET REGISTER Address: 0x2F, Reset: 0x00, Name: Reset RECOMMENDED SOLDERING PROFILE PCB FOOTPRINT PATTERN PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS BRANDING INFORMATION ORDERING GUIDE