Datasheet AD652 (Analog Devices) - 10

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AD652 SVFC CONNECTION FOR DUAL SUPPLY, POSITIVE
the AD652 is specified for a 0 V to 10 V input range using the
INPUT VOLTAGES
internal 20 kΩ resistor. If a current input is used, the gain drift is degraded by a maximum of 100 ppm/°C (the TC of the 20 kΩ Figure 8 shows the AD652 connection scheme for the resistor). If an external resistor is connected to Pin 5 to establish traditional dual supply, positive input mode of operation. The a different input voltage range, drift is induced to the extent that ±VS range is from ±6 V to ±18 V. When +VS is lower than 9.0 V, the external resistor’s TC differs from the TC of the internal As shown in Figure 8, three additional connections are required resistor. The external resistor used to establish a different input The first connection is to short Pin 13 to Pin 8 (Analog Ground voltage range should be selected to provide a full-scale current to −VS) and add a pull-up resistor to +VS (as shown in of 0.5 mA (i.e., 10 kΩ for 0 V to 5 V). Figure 21). The pull-up resistor is determined by the following equation:
SVFC CONNECTIONS FOR NEGATIVE INPUT VOLTAGES
2V − 5 V R = S PULLUP Voltages that are negative with respect to ground may be used 500 µA as the input to the AD652 SVFC. In this case, Pin 7 is grounded These connections ensure proper operation of the 5 V reference. and the input voltage is applied to Pin 6 (see Figure 9). In this mode, the input voltage can go as low as 4 V above −V Tie Pin 16 to Pin 6 (as shown in Figure 21) to ensure that the S. In this configuration, the input is a high impedance, and only the integrator output ramps down far enough to trip the comparator. 20 nA (typical) input bias current of the op amp must be supplied by the input signal. This is contrasted with the more The CERDIP-packaged AD652 accepts either a 0 V to 10 V or usual positive input voltage configuration, which has a 20 kΩ 0 mA to 0.5 mA full-scale input signal. The temperature drift of input impedance and requires 0.5 mA from the signal source.
+VS AD652 SYNCHRONOUS VOLTAGE-TO- 5V 1 FREQUENCY 16 REFERENCE CONVERTER 2 15 3 14 4 13 ANALOG C GND INT 5 12 ONE R DIGITAL L 5V SHOT GND – 6 11 FREQ VIN 20k
Ω
OUT + 7 10 1mA CLOCK Q CK –V 8 9 +V S S AND D "D" Q FLOP
00798-008 Figure 8. Standard V/F Connection for Positive Input Voltage with Dual Supply
+VS AD652 SYNCHRONOUS VOLTAGE-TO- 5V 1 FREQUENCY 16 REFERENCE CONVERTER 2 15 3 14 4 13 ANALOG C GND INT 5 12 ONE R DIGITAL L 5V SHOT GND – 6 11 FREQ VIN 20k
Ω
OUT + 7 10 1mA CLOCK Q CK 8 9 +VS AND D "D" –VS Q FLOP
00798-009 Figure 9. Negative Voltage Input Rev. C | Page 9 of 28 Document Outline FEATURES PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION DEFINITIONS OF SPECIFICATIONS THEORY OF OPERATION OVERRANGE SVFC CONNECTION FOR DUAL SUPPLY, POSITIVE INPUT VOLTAGES SVFC CONNECTIONS FOR NEGATIVE INPUT VOLTAGES SVFC CONNECTION FOR BIPOLAR INPUT VOLTAGES PLCC CONNECTIONS GAIN AND OFFSET CALIBRATION GAIN PERFORMANCE REFERENCE NOISE DIGITAL INTERFACING CONSIDERATIONS COMPONENT SELECTION DIGITAL GROUND SINGLE-SUPPLY OPERATION FREQUENCY-TO-VOLTAGE CONVERTER DECOUPLING AND GROUNDING FREQUENCY OUTPUT MULTIPLIER SINGLE-LINE MULTIPLEXED DATA TRANSMISSION Multiplexer Transmitter SVFC Demultiplexer Analog Signal Reconstruction ISOLATED FRONT END A-TO-D CONVERSION DELTA MODULATOR BRIDGE TRANSDUCER INTERFACE OUTLINE DIMENSIONS ORDERING GUIDE