Datasheet AD8143 (Analog Devices) - 4

Data Sheet AD8143 SPECIFICATIONS
VS = ±12 V, TA = 25°C, REF = 0 V, RL = 150 Ω, CL = 2 pF, G = 1, TMIN to TMAX = −40°C to +85°C, unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth VOUT = 0.2 V p-p 260 MHz VOUT = 2 V p-p 160 MHz Bandwidth for 0.1dB Flatness VOUT = 0.2 V p-p 45 MHz Slew Rate VOUT = 2 V p-p, RL = 1 kΩ 1000 V/µs Settling Time VOUT = 2 V p-p, 1% 8 ns VOUT = 2 V p-p, 0.1% 31 ns Output Overdrive Recovery 50 ns NOISE/DISTORTION Second Harmonic VOUT = 2 V p-p, 1 MHz −70 dBc Third Harmonic VOUT = 2 V p-p, 1 MHz −80 dBc Crosstalk VOUT = 1 V p-p, 10 MHz −70 dB Input Voltage Noise (RTI) f ≥ 10 kHz 14 nV/√Hz Differential Gain Error NTSC, 200 IRE, RL ≥ 150 Ω 0.03 % Differential Phase Error NTSC, 200 IRE, RL ≥ 150 Ω 0.06 Degrees INPUT CHARACTERISTICS Common-Mode Rejection DC, VCM = −3.5 V to +3.5 V 86 90 dB VCM = 1 V p-p, f = 10 MHz 65 dB VCM = 1 V p-p, f = 100 MHz 28 dB Common-Mode Voltage Range V+IN − V−IN = 0 V ±10.5 V Differential Operating Range ±2.5 V Resistance Differential 5 MΩ Common-mode 3 MΩ Capacitance Differential 2 pF Common-mode 3 pF DC PERFORMANCE Open-Loop Gain VOUT = ±1 V 70 dB Closed-Loop Gain Error DC 0.25 % Input Offset Voltage −4.3 +4.3 mV TMIN to TMAX 15 µV/°C Input Bias Current (+IN, −IN) −3.0 +3.0 µA Input Bias Current (REF, FB) −4.6 +3.7 µA Input Bias Current Drift TMIN to TMAX (+IN, −IN) 16 nA/°C Input Offset Current (+IN, −IN, REF, FB) −2.55 +1.45 µA Input Offset Current Drift TMIN to TMAX ±3 nA/°C OUTPUT PERFORMANCE Voltage Swing RLOAD = 1 kΩ −10.80 +10.82 V Output Current 40 mA Short Circuit Current Short to GND, source/sink 107/147 mA COMPARATOR PERFORMANCE VOH 3.135 3.3 V VOL 0.2 0.255 V Hysteresis Width 41 mV Input Bias Current Input driven low 3.5 µA Propagation Delay, tPLH RL = 10 kΩ 20 ns Propagation Delay, tPHL RL = 10 kΩ 15 ns Output Rise Time 25% to 75%, RL = 10 kΩ 15 ns Output Fall Time 25% to 75%, RL = 10 kΩ 11 ns Rev. A | Page 3 of 24 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION OVERVIEW BASIC CLOSED-LOOP GAIN CONFIGURATIONS TERMINATING THE INPUT INPUT CLAMPING PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS Minimizing Parasitic Reactances in the Feedback Network Maximizing Heat Removal DRIVING A CAPACITIVE LOAD POWER-DOWN COMPARATORS SYNC PULSE EXTRACTION USING COMPARATORS OUTLINE DIMENSIONS ORDERING GUIDE