Datasheet AP1910 (Anwell Semiconductor) - 5
| Manufacturer | Anwell Semiconductor |
| Description | Universal High Brightness LED Driver Controller |
| Pages / Page | 11 / 5 — AP1910 Anwell Semiconductor Corp. Electrical Characteristics. Symbol. … |
| File Format / Size | PDF / 583 Kb |
| Document Language | English |
AP1910 Anwell Semiconductor Corp. Electrical Characteristics. Symbol. Parameter. Test Conditions. Min Typ Max Unit
Model Line for this Datasheet
Text Version of Document
AP1910 Anwell Semiconductor Corp. Electrical Characteristics
(TA=25℃, unless otherwise noted.)
Symbol Parameter Test Conditions Min Typ Max Unit
Input DC supply voltage VINDC Line Voltage or DC input voltage 8 450 V range Shut-Down mode IINSD PWM_D to GND, VIN=8V 0.1 0.2 mA supply current Internal regulated VDD V voltage IN=8~450V 6.7 7.5 8 V VDD under voltage UVLO V lockout threshold DD rising 5.5 6 6.5 V ∆UVLO UVLO hysteresis VDD falling 500 mV VEN(hi) PWMD input high level VIN=8~450V 2.0 V VEN(lo) PWMD input low level VIN=8~450V 0.8 V Current sense pull-in o VCS-TH V C 235 245 255 mV threshold voltage IN=8~450V，TA=25 Linear dimming pin VLD V voltage range IN=8~450 0 250 mV o Current sense blanking T C, V T A=25 LD = VDD, BLANK 250 500 650 ns time VCS = VCS-TH + 50mV after TBLANK to 0.22V after TBLANK ROSC = 1MΩ (Connect to RT and GND) 21 KHz FOSC Oscillator frequency ROSC = 200KΩ (Connect to RT and GND) 93 KHz ROFF = 1MΩ (Connect to RT and GATE) 54 us TOFF Constant off-time ROFF = 200KΩ (Connect to RT and GATE) 13 us DMAX Maximum duty cycle HV floating 95 % ISOURCE GATE sourcing current VGATE=0V, VDD=7.5V 165 mA ISINK GATE sinking current VGATE= VDD, VDD=7.5V 165 mA tR GATE rising time CGATE= 500pF, VDD=7.5V 50 150 ns tF GATE falling time CGATE= 500pF, VDD=7.5V 50 150 ns Thermal Shutdown TTST 155 °C Temperature Thermal Shutdown TTSH 40 °C Hysteresis Note : The suggest Qg of NMOS around 6.5 nC(Typ.),it can improve efficiency. All reserved by AnSC © 2012 Page: 5/11 V1.6-2014/09/29
(TA=25℃, unless otherwise noted.)
Symbol Parameter Test Conditions Min Typ Max Unit
Input DC supply voltage VINDC Line Voltage or DC input voltage 8 450 V range Shut-Down mode IINSD PWM_D to GND, VIN=8V 0.1 0.2 mA supply current Internal regulated VDD V voltage IN=8~450V 6.7 7.5 8 V VDD under voltage UVLO V lockout threshold DD rising 5.5 6 6.5 V ∆UVLO UVLO hysteresis VDD falling 500 mV VEN(hi) PWMD input high level VIN=8~450V 2.0 V VEN(lo) PWMD input low level VIN=8~450V 0.8 V Current sense pull-in o VCS-TH V C 235 245 255 mV threshold voltage IN=8~450V，TA=25 Linear dimming pin VLD V voltage range IN=8~450 0 250 mV o Current sense blanking T C, V T A=25 LD = VDD, BLANK 250 500 650 ns time VCS = VCS-TH + 50mV after TBLANK to 0.22V after TBLANK ROSC = 1MΩ (Connect to RT and GND) 21 KHz FOSC Oscillator frequency ROSC = 200KΩ (Connect to RT and GND) 93 KHz ROFF = 1MΩ (Connect to RT and GATE) 54 us TOFF Constant off-time ROFF = 200KΩ (Connect to RT and GATE) 13 us DMAX Maximum duty cycle HV floating 95 % ISOURCE GATE sourcing current VGATE=0V, VDD=7.5V 165 mA ISINK GATE sinking current VGATE= VDD, VDD=7.5V 165 mA tR GATE rising time CGATE= 500pF, VDD=7.5V 50 150 ns tF GATE falling time CGATE= 500pF, VDD=7.5V 50 150 ns Thermal Shutdown TTST 155 °C Temperature Thermal Shutdown TTSH 40 °C Hysteresis Note : The suggest Qg of NMOS around 6.5 nC(Typ.),it can improve efficiency. All reserved by AnSC © 2012 Page: 5/11 V1.6-2014/09/29
