Datasheet AT90S1200 (Atmel) - 7
| Manufacturer | Atmel |
| Description | 8-bit AVR Microcontroller with 1K Byte of In-System Programmable Flash |
| Pages / Page | 71 / 7 — AT90S1200. Program and Data. Addressing Modes. Register Direct, Single. … |
| File Format / Size | PDF / 1.5 Mb |
| Document Language | English |
AT90S1200. Program and Data. Addressing Modes. Register Direct, Single. Figure 6. Register Rd. Register Indirect. Figure 7
Model Line for this Datasheet
- AT90S1200-12PC AT90S1200-12PI AT90S1200-12SC AT90S1200-12SI AT90S1200-12YC AT90S1200-12YI AT90S1200-4PC AT90S1200-4PI AT90S1200-4SC AT90S1200-4SI AT90S1200-4YC AT90S1200-4YI AT90S1200A-12PC AT90S1200A-12PI AT90S1200A-12SC AT90S1200A-12SI AT90S1200A-12YC AT90S1200A-12YI AT90S1200A-4PC AT90S1200A-4PI AT90S1200A-4SC AT90S1200A-4SI AT90S1200A-4YC AT90S1200A-4YI
Text Version of Document
AT90S1200 Program and Data
The AT90S1200 AVR RISC Microcontroller supports powerful and efficient addressing
Addressing Modes
modes. This section describes the different addressing modes supported in the AT90S1200. In the figures, OP means the operation code part of the instruction word. To simplify, not all figures show the exact location of the addressing bits.
Register Direct, Single Figure 6.
Direct Single Register Addressing
Register Rd
The operand is contained in register d (Rd).
Register Indirect Figure 7.
Indirect Register Addressing The register accessed is the one pointed to by the Z-register (R30).
Register Direct, Two Registers Figure 8.
Direct Register Addressing, Two Registers
Rd and Rr 7
0838H–AVR–03/02 Document Outline Features Pin Configuration Description Block Diagram Pin Descriptions VCC GND Port B (PB7..PB0) Port D (PD6..PD0) RESET XTAL1 XTAL2 Crystal Oscillator On-chip RC Oscillator Architectural Overview General Purpose Register File ALU – Arithmetic Logic Unit In-System Programmable Flash Program Memory Program and Data Addressing Modes Register Direct, Single Register Rd Register Indirect Register Direct, Two Registers Rd and Rr I/O Direct Relative Program Addressing, RJMP and RCALL Subroutine and Interrupt Hardware Stack EEPROM Data Memory Instruction Execution Timing I/O Memory Status Register – SREG Reset and Interrupt Handling Reset Sources Power-on Reset External Reset Watchdog Reset Interrupt Handling General Interrupt Mask Register – GIMSK Timer/Counter Interrupt Mask Register – TIMSK Timer/Counter Interrupt FLAG Register – TIFR External Interrupts Interrupt Response Time MCU Control Register – MCUCR Sleep Modes Idle Mode Power-down Mode Timer/Counter0 Timer/Counter0 Prescaler Timer/Counter0 Control Register – TCCR0 Timer/Counter0 – TCNT0 Watchdog Timer Watchdog Timer Control Register – WDTCR EEPROM Read/Write Access EEPROM Address Register – EEAR EEPROM Data Register – EEDR EEPROM Control Register – EECR Prevent EEPROM Corruption Analog Comparator Analog Comparator Control and Status Register – ACSR I/O Ports Port B Port B Data Register – PORTB Port B Data Direction Register – DDRB Port B Input Pin Address – PINB Port B as General Digital I/O Alternate Functions of Port B Port B Schematics Port D Port D Data Register – PORTD Port D Data Direction Register – DDRD Port D Input Pins Address – PIND Port D as General Digital I/O Alternate Functions for Port D Port D Schematics Memory Programming Program and Data Memory Lock Bits Fuse Bits Signature Bytes Programming the Flash and EEPROM Parallel Programming Signal Names Enter Programming Mode Chip Erase Programming the Flash Reading the Flash Programming the EEPROM Reading the EEPROM Programming the Fuse Bits Programming the Lock Bits Reading the Fuse and Lock Bits Reading the Signature Bytes Parallel Programming Characteristics Serial Downloading Serial Programming Algorithm Data Polling EEPROM Data Polling Flash Serial Programming Characteristics Electrical Characteristics Absolute Maximum Ratings* DC Characteristics External Clock Drive Waveforms External Clock Drive Typical Characteristics AT90S1200 Register Summary Instruction Set Summary Ordering Information(1) Packaging Information 20P3 20S 20Y Table of Contents
The AT90S1200 AVR RISC Microcontroller supports powerful and efficient addressing
Addressing Modes
modes. This section describes the different addressing modes supported in the AT90S1200. In the figures, OP means the operation code part of the instruction word. To simplify, not all figures show the exact location of the addressing bits.
Register Direct, Single Figure 6.
Direct Single Register Addressing
Register Rd
The operand is contained in register d (Rd).
Register Indirect Figure 7.
Indirect Register Addressing The register accessed is the one pointed to by the Z-register (R30).
Register Direct, Two Registers Figure 8.
Direct Register Addressing, Two Registers
Rd and Rr 7
0838H–AVR–03/02 Document Outline Features Pin Configuration Description Block Diagram Pin Descriptions VCC GND Port B (PB7..PB0) Port D (PD6..PD0) RESET XTAL1 XTAL2 Crystal Oscillator On-chip RC Oscillator Architectural Overview General Purpose Register File ALU – Arithmetic Logic Unit In-System Programmable Flash Program Memory Program and Data Addressing Modes Register Direct, Single Register Rd Register Indirect Register Direct, Two Registers Rd and Rr I/O Direct Relative Program Addressing, RJMP and RCALL Subroutine and Interrupt Hardware Stack EEPROM Data Memory Instruction Execution Timing I/O Memory Status Register – SREG Reset and Interrupt Handling Reset Sources Power-on Reset External Reset Watchdog Reset Interrupt Handling General Interrupt Mask Register – GIMSK Timer/Counter Interrupt Mask Register – TIMSK Timer/Counter Interrupt FLAG Register – TIFR External Interrupts Interrupt Response Time MCU Control Register – MCUCR Sleep Modes Idle Mode Power-down Mode Timer/Counter0 Timer/Counter0 Prescaler Timer/Counter0 Control Register – TCCR0 Timer/Counter0 – TCNT0 Watchdog Timer Watchdog Timer Control Register – WDTCR EEPROM Read/Write Access EEPROM Address Register – EEAR EEPROM Data Register – EEDR EEPROM Control Register – EECR Prevent EEPROM Corruption Analog Comparator Analog Comparator Control and Status Register – ACSR I/O Ports Port B Port B Data Register – PORTB Port B Data Direction Register – DDRB Port B Input Pin Address – PINB Port B as General Digital I/O Alternate Functions of Port B Port B Schematics Port D Port D Data Register – PORTD Port D Data Direction Register – DDRD Port D Input Pins Address – PIND Port D as General Digital I/O Alternate Functions for Port D Port D Schematics Memory Programming Program and Data Memory Lock Bits Fuse Bits Signature Bytes Programming the Flash and EEPROM Parallel Programming Signal Names Enter Programming Mode Chip Erase Programming the Flash Reading the Flash Programming the EEPROM Reading the EEPROM Programming the Fuse Bits Programming the Lock Bits Reading the Fuse and Lock Bits Reading the Signature Bytes Parallel Programming Characteristics Serial Downloading Serial Programming Algorithm Data Polling EEPROM Data Polling Flash Serial Programming Characteristics Electrical Characteristics Absolute Maximum Ratings* DC Characteristics External Clock Drive Waveforms External Clock Drive Typical Characteristics AT90S1200 Register Summary Instruction Set Summary Ordering Information(1) Packaging Information 20P3 20S 20Y Table of Contents
