Datasheet LT1021 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Precision Reference |
| Pages / Page | 16 / 9 — APPLICATIONS INFORMATION. Effect of Reference Drift on System Accuracy. … |
| File Format / Size | PDF / 239 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. Effect of Reference Drift on System Accuracy. LT1021-5. Maximum Allowable Reference Drift. LT1021-7
Model Line for this Datasheet
- 5962-8860001GA 5962-8876201GA 5962-8876202GA LT1021BCH-5 LT1021BCN8-10#PBF LT1021BCN8-5#PBF LT1021BCN8-7#PBF LT1021BMH-10 LT1021BMH-5 LT1021CCH-5 LT1021CCN8-10#PBF LT1021CCN8-5#PBF LT1021CIN8-10#PBF LT1021CIN8-5#PBF LT1021CMH-5 LT1021DCN8-10#PBF LT1021DCN8-5#PBF LT1021DCN8-7#PBF LT1021DCS8-10#PBF LT1021DCS8-10#TRPBF LT1021DCS8-5#PBF LT1021DCS8-5#TRPBF LT1021DCS8-7#PBF LT1021DCS8-7#TRPBF LT1021DIN8-10#PBF LT1021DIN8-5#PBF
Text Version of Document
LT1021
U U W U APPLICATIONS INFORMATION Effect of Reference Drift on System Accuracy
The LT1021-10 “C” version is pre-trimmed to ±5mV and therefore can utilize a restricted trim range. A 75k resistor A large portion of the temperature drift error budget in in series with a 20kΩ potentiometer will give ±10mV trim many systems is the system reference voltage. This graph range. Effect on the output TC will be only 1ppm/°C for the indicates the maximum temperature coefficient allowable ±5mV trim needed to set the “C” device to 10.000V. if the reference is to contribute no more than 0.5LSB error to the overall system performance. The example shown is
LT1021-5
a 12-bit system designed to operate over a temperature range from 25°C to 65°C. Assuming the system calibra- The LT1021-5 does have an output voltage trim pin, but tion is performed at 25°C, the temperature span is 40°C. the TC of the nominal 4V open-circuit voltage at this pin is It can be seen from the graph that the temperature coeffi- about – 1.7mV/°C. For the voltage trimming not to affect cient of the reference must be no worse than 3ppm/°C if reference output TC, the external trim voltage must track it is to contribute less than 0.5LSB error. For this reason, the voltage on the trim pin. Input impedance of the trim pin the LT1021 family has been optimized for low drift. is about 100kΩ and attenuation to the output is 13:1. The technique shown below is suggested for trimming the
Maximum Allowable Reference Drift
output of the LT1021-5 while maintaining minimum shift in output temperature coefficient. The R1/R2 ratio is 100 chosen to minimize interaction of trimming and TC shifts, 8-BIT so the exact values shown should be used. °C) 10-BIT LT1021-5 10 IN OUT VOUT 12-BIT GND TRIM R1 0.5LSB ERROR (ppm/ 27k R2 14-BIT 50k 1N4148 MAXIMUM TEMPERATURE COEFFICIENT FOR 1.0 0 10 20 30 40 50 60 70 80 90 100 1021 AI02 TEMPERATURE SPAN (°C) LT1021 AI01
LT1021-7 Trimming Output Voltage
The 7V version of the LT1021 has no trim pin because the internal architecture does not have a point which could be
LT1021-10
driven conveniently from the output. Trimming must therefore be done externally, as is the case with ordinary The LT1021-10 has a trim pin for adjusting output voltage. reference diodes. Unlike these diodes, however, the out- The impedance of the trim pin is about 12kΩ with a put of the LT1021 can be loaded with a trim potentiometer. nominal open-circuit voltage of 5V. It is designed to be The following trim techniques are suggested; one for driven from a source impedance of 3kΩ or less to mini- voltage output and one for current output. The voltage mize changes in the LT1021 TC with output trimming. output is trimmed for 6.95V. Current output is 1mA, as Attenuation between the trim pin and the output is 70:1. shown, into a summing junction, but all resistors may be This allows ±70mV trim range when the trim pin is tied to scaled for currents up to 10mA. the wiper of a potentiometer connected between the output and ground. A 10kΩ potentiometer is recom- Both of these circuits use the trimmers in a true potentio- mended, preferably a 20 turn cermet type with stable metric mode to reduce the effects of trimmer TC. The characteristics over time and temperature. voltage output has a 200Ω impedance, so loading must be 1021fc 9
U U W U APPLICATIONS INFORMATION Effect of Reference Drift on System Accuracy
The LT1021-10 “C” version is pre-trimmed to ±5mV and therefore can utilize a restricted trim range. A 75k resistor A large portion of the temperature drift error budget in in series with a 20kΩ potentiometer will give ±10mV trim many systems is the system reference voltage. This graph range. Effect on the output TC will be only 1ppm/°C for the indicates the maximum temperature coefficient allowable ±5mV trim needed to set the “C” device to 10.000V. if the reference is to contribute no more than 0.5LSB error to the overall system performance. The example shown is
LT1021-5
a 12-bit system designed to operate over a temperature range from 25°C to 65°C. Assuming the system calibra- The LT1021-5 does have an output voltage trim pin, but tion is performed at 25°C, the temperature span is 40°C. the TC of the nominal 4V open-circuit voltage at this pin is It can be seen from the graph that the temperature coeffi- about – 1.7mV/°C. For the voltage trimming not to affect cient of the reference must be no worse than 3ppm/°C if reference output TC, the external trim voltage must track it is to contribute less than 0.5LSB error. For this reason, the voltage on the trim pin. Input impedance of the trim pin the LT1021 family has been optimized for low drift. is about 100kΩ and attenuation to the output is 13:1. The technique shown below is suggested for trimming the
Maximum Allowable Reference Drift
output of the LT1021-5 while maintaining minimum shift in output temperature coefficient. The R1/R2 ratio is 100 chosen to minimize interaction of trimming and TC shifts, 8-BIT so the exact values shown should be used. °C) 10-BIT LT1021-5 10 IN OUT VOUT 12-BIT GND TRIM R1 0.5LSB ERROR (ppm/ 27k R2 14-BIT 50k 1N4148 MAXIMUM TEMPERATURE COEFFICIENT FOR 1.0 0 10 20 30 40 50 60 70 80 90 100 1021 AI02 TEMPERATURE SPAN (°C) LT1021 AI01
LT1021-7 Trimming Output Voltage
The 7V version of the LT1021 has no trim pin because the internal architecture does not have a point which could be
LT1021-10
driven conveniently from the output. Trimming must therefore be done externally, as is the case with ordinary The LT1021-10 has a trim pin for adjusting output voltage. reference diodes. Unlike these diodes, however, the out- The impedance of the trim pin is about 12kΩ with a put of the LT1021 can be loaded with a trim potentiometer. nominal open-circuit voltage of 5V. It is designed to be The following trim techniques are suggested; one for driven from a source impedance of 3kΩ or less to mini- voltage output and one for current output. The voltage mize changes in the LT1021 TC with output trimming. output is trimmed for 6.95V. Current output is 1mA, as Attenuation between the trim pin and the output is 70:1. shown, into a summing junction, but all resistors may be This allows ±70mV trim range when the trim pin is tied to scaled for currents up to 10mA. the wiper of a potentiometer connected between the output and ground. A 10kΩ potentiometer is recom- Both of these circuits use the trimmers in a true potentio- mended, preferably a 20 turn cermet type with stable metric mode to reduce the effects of trimmer TC. The characteristics over time and temperature. voltage output has a 200Ω impedance, so loading must be 1021fc 9
