Datasheet LTM4636 (Analog Devices) - 8

LTM4636
pin FuncTions SGND (F4, G4):
Signal Ground Pin. Return ground path for and PVCC together along with INTVCC. Then tie RUNP to all analog and low power circuitry. Tie a single connection GND. If VIN > 5.5V then operate PVCC regulator as normal. to the output capacitor GND in the application. See layout See the Typical Application examples. guidelines in Figure 18.
TEMP+ (G12):
Temperature Monitor. An internal diode
INTVCC (F6):
Internal 5.5V LDO for Driving the Control connected NPN transistor. See the Applications Informa- Circuitry in the LTM4636. INTVCC is controlled and enabled tion section. when RUNC is activated high. Tie to VIN, when 4.7V ≤ VIN
TEMP– (G11):
Low Side of the Internal Temperature ≤ 5.5V, minimum VIN = 4.2V. Monitor.
FREQ (G5):
A resistor can be applied from this pin to
CLKOUT (G3):
Clock out signal that can be phase selected ground to set the operating frequency. This pin sources to the main internal clock or synchronized clock using 20µA. See the Applications Information section. the PHASMD pin. CLKOUT can be used for multiphase
PHASMD (G7):
This pin can be voltage programmed to applications. See the Applications Information section. change the phase relationship of the CLKOUT pin with
TEST1 (H4), TEST2 (F5), TEST3 (H2), TEST4 (E11), GMON
reference to the internal clock or an input synchronized
(H9):
These are test pins used in the final production test clock. The INTVCC (5.5V) output can be voltage divided of the part. Leave floating. down to the PHASMD pin to set the particular phase. The Electrical Characteristics show the different settings to
VIN (H5-H6, J4-J7, K4-K8, L4-L8, M4-M8):
Power Input select a particular phase. See the Applications Informa- Pins. Apply input voltage between these pins and GND tion section. pins. Recommend placing input decoupling capacitance directly between V
RUNP (G8):
This pin enables the PV IN and GND pins. CC supply. This pin can be connected to VIN, or tie to ground when connecting
PWM (H7):
PWM output that drives the power stage. PVCC to VIN ≤ 5.5V. RUNP needs to sequence up before Primarily used for test, but can be monitored in debug RUNC. A 15k resistor from PVCC to RUNC with a 0.1µF or testing. capacitor will provide enough delay. In parallel operation
TMON (H8):
Temperature Monitor Pin. Internal temperature with multiple LTM4636s, the resistor can be reduced in monitor, varies from 1V at 25°C to 1.44V at 150°C, disables value by N times and the 0.1µF can be increased N times. power stage at 150°C. If this feature is not desired, then See Applications Information section. RUNP can be used to tie the TMON pin to GND. set the minimum UVLO with a voltage divider. See Figure 1.
SW (L11, K11):
These are pin connections to the internal
NC (G9):
No Connection. switch node for test evaluation and monitoring. An R-C
PVCC (F9):
5V Power Output and Power for Internal Power snubber can be placed from the switch pins to GND to MOSFET Drivers. The regulator can power 50mA of external eliminate any high frequency ringing. See the Applications sourcing for additional use. Place a 22µF ceramic filter Information section. capacitor on this pin to ground. When VIN < 5.5V, tie VIN 4636f 8 For more information www.linear.com/LTM4636 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photo Typical Application Design Resources Related Parts