Datasheet LTM4613 (Analog Devices) - 10

LTM4613
OPERATION Power Module Description
off and bottom FET M2 is turned on and held on until the The LTM4613 is a standalone nonisolated switch mode overvoltage condition clears. DC/DC power supply. It can deliver 8A of DC output cur- Input filter and noise cancellation circuitry reduce the rent with minimal external input and output capacitors. noise coupling to inputs and outputs, and ensure the This module provides a precisely regulated output voltage electromagnetic interference (EMI) meets the limits of programmable via one external resistor from 3.3VDC to EN55022 Class B (see Figure 7). 15VDC over a wide 5V to 36V input voltage. The typical Pulling the RUN pin below 1V forces the controller into application schematic is shown in Figure 18. its shutdown state, turning off both M1 and M2. At light The LTM4613 has an integrated constant on-time current load currents, discontinuous mode (DCM) operation can mode regulator, ultralow RDS(ON) FETs with fast switching be enabled to achieve higher efficiency compared to con- speed and integrated Schottky diodes. The typical switching tinuous mode (CCM) by setting FCB pin higher than 0.6V. frequency is 600kHz at full load at 12V output. With current When the DRV mode control and internal feedback loop compensation, CC pin is connected to INTVCC, an integrated 5V linear regulator powers the internal gate drivers. If a the LTM4613 module has sufficient stability margins and 5V external bias supply is applied on DRVCC pin, then an good transient performance under a wide range of operat- efficiency improvement will occur due to the reduced power ing conditions and with a wide range of output capacitors, loss in the internal linear regulator. This is especially true even all ceramic output capacitors. at the higher input voltage range. Current mode control provides cycle-by-cycle fast current The MPGM, MARG0, and MARG1 pins are used to sup- limiting. Moreover, foldback current limiting is provided in port voltage margining, where the percentage of margin an overcurrent condition when VFB drops. Internal over- is programmed by the MPGM pin, while the MARG0 and voltage and undervoltage comparators pull the open-drain MARG1 select positive or negative margining. The PLLIN PGOOD output low if the output feedback voltage exits a pin provides frequency synchronization of the device to ±10% window around the regulation point. Furthermore, an external clock. The TRACK/SS pin is used for power in an overvoltage condition, internal top FET M1 is turned supply tracking and soft-start programming.
APPLICATIONS INFORMATION
The typical LTM4613 application circuit is shown in Fig-
Output Voltage Programming and Margining
ure 18. External component selection is primarily deter- The PWM controller has an internal 0.6V reference volt- mined by the input voltage, the maximum load current and age. As shown in the Block Diagram, a 100k 0.5% internal the output voltage. Refer to Table 2 for specific external feedback resistor connects the V capacitor requirements for a particular application. OUT and VFB pins together. Adding a resistor, RFB, from the VFB pin to the SGND pin
V
programs the output voltage.
IN to VOUT Step-Down Ratios
There are restrictions in the maximum V 100k +R IN and VOUT step V FB OUT = 0.6V • down ratio that can be achieved for a given input voltage. RFB These constraints are shown in the Typical Performance or equivalently, Characteristic curve labeled “VIN to VOUT Step-Down Ratio.” Note that additional thermal derating may be ap- 100k plied. See the Thermal Considerations and Output Current RFB = VOUT Derating section in this data sheet. − 1 0.6V 4613fd 10 For more information www.linear.com/LTM4613 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Package Photograph Related Parts