Datasheet ADP5091, ADP5092 (Analog Devices) - 3

Data Sheet ADP5091/ADP5092 DETAILED FUNCTIONAL BLOCK DIAGRAM ADP5091/ADP5092 SYS LDO CSYS RSYS REG_SWITCHES BACK_UP REG_OUT + – REG_FB BACK_UP BK SWITCHES BACK_UP REG_D0 HYSTERESIS CONTROL SYS SWITCH REG_D1 REGULATOR AND LDO VID BAT SWITCHES PHOTOVOLTAIC L CELL SW BAT + + HS SD – – CIN BAT VIN COLD START CHARGE PUMP LS BK REF SYS ROC2 MPPT MPPT CONTROLLER TERM_REF SETSD ROC1 EN_BST SD CHARGE CBP CONTROL BOOST AND CONTROLLER PGOOD POWER PATH MANAGEMENT PG MINOP SETPG PG SETHYST DIS_SW K PG CL BK VINT_REF SETBK LLD (ADP5091) REG_GOOD (ADP5092) TERM_REF TERM TERM CONTROL BIAS REFERENCE VREF 2R AND OSCILLATOR CLK R PGND AGND BAT
040 14145- Figure 2. Detailed Functional Block Diagram Rev. A | Page 3 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS REGULATED OUTPUT SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION FAST COLD START-UP CIRCUIT (VSYS < VSYS_TH, VIN > VIN_COLD) MAIN BOOST REGULATOR (VBAT_TERM > VSYS > VSYS_TH) VIN OPEN CIRCUIT AND MPPT MINIMUM OPERATION THRESHOLD FUNCTION DISABLING BOOST REGULATED OUTPUT WORKING MODE REG_D0 AND REG_D1 REGULATED OUTPUT CONFIGURATION REG_GOOD (ADP5092 ONLY) ENERGY STORAGE CHARGE MANAGEMENT BACKUP STORAGE PATH BACKUP AND BAT SELECTION THRESHOLD BATTERY OVERCHARGING PROTECTION BATTERY DISCHARGING PROTECTION POWER GOOD (PGOOD) POWER PATH WORKING FLOW CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ENERGY HARVESTER SELECTION ENERGY STORAGE ELEMENT SELECTION INDUCTOR SELECTION CAPACITOR SELECTION Input Capacitor SYS Capacitor REG_OUT Capacitor CBP Capacitor LAYOUT AND ASSEMBLY CONSIDERATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE