Datasheet ADE7761B (Analog Devices) - 6

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ADE7761B PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD 1 20 F1 V1A 2 19 F2 V1B 3 18 CF V1N 4 17 DGND V2N 5 ADE7761B 16 REVP V2P 6 TOP VIEW 15 FAULT MISCAL (Not to Scale) 7 14 RCLKIN AGND 8 13 PGA REFIN/OUT 9 12 S0
3 -00
SCF 10 11 S1
797 06 Figure 3. Pin Configuration (SSOP)
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 VDD Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7761B. The supply voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor. 2, 3 V1A, V1B Analog Inputs for Channel V1 (Current Channel). These inputs are fully differential voltage inputs with maximum differential input signal levels of ±660 mV with respect to V1N for specified operation. The maximum signal level at these pins is ±1 V with respect to AGND. Both inputs have internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on these inputs without risk of permanent damage. 4 V1N Negative Input for Differential Voltage Inputs, V1A and V1B. The maximum signal level at this pin is ±1 V with respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this input without risk of permanent damage. The input should be directly connected to the burden resistor and held at a fixed potential, that is, AGND. See the Analog Inputs section. 5 V2N Negative Input for Differential Voltage Inputs, V2P and MISCAL. The maximum signal level at this pin is ±1 V with respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this input without risk of permanent damage. The input should be held at a fixed potential, that is, AGND. See the Analog Inputs section. 6 V2P Analog Input for Channel V2 (Voltage Channel). This input is a fully differential voltage input with maximum differential input signal levels of ±660 mV with respect to V2N for specified operation. The maximum signal level at this pin is ±1 V with respect to AGND. This input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this input without risk of permanent damage. 7 MISCAL Analog Input for Missing Neutral Calibration. This pin can be used to calibrate the CF, F1, and F2 frequencies in the missing neutral condition. This input is a fully differential voltage input with maximum differential input signal levels of 660 mV with respect to V2N for specified operation. The maximum signal level at this pin is ±1 V with respect to AGND. This input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this input without risk of permanent damage. 8 AGND Analog Ground. This pin provides the ground reference for the analog circuitry in the ADE7761B, that is, ADCs and reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the ground reference for all analog circuitry such as antialiasing filters and current and voltage transducers. For good noise suppression, the analog ground plane should be connected to the digital ground plane only at the DGND pin. 9 REFIN/OUT This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 2.5 V ± 8% and a typical temperature coefficient of 30 ppm/°C. An external reference source can also be connected at this pin. In either case, this pin should be decoupled to AGND with a 1 μF ceramic capacitor and 100 nF ceramic capacitor. 10 SCF Select Calibration Frequency. This logic input is used to select the frequency on the Calibration Output CF. Table 7 shows how the calibration frequencies are selected. 11, 12 S1, S0 These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion. This offers the designer greater flexibility when designing the energy meter. See the Selecting a Frequency for an Energy Meter Application section. 13 PGA This logic input is used to select the gain for the analog inputs, V1A and V1B. The possible gains are 1 and 16. 14 RCLKIN To enable the internal oscillator as a clock source on the chip, a precise low temperature drift resistor at a nominal value of 6.2 kΩ must be connected from this pin to DGND. Rev. 0 | Page 6 of 24 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS Timing Diagram ABSOLUTE MAXIMUM RATINGS PERFORMANCE ISSUES THAT MAY AFFECT BILLING ACCURACY Case 1 Case 2 ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUIT TERMINOLOGY THEORY OF OPERATION POWER SUPPLY MONITOR ANALOG INPUTS Channel V1 (Current Channel) Channel V2 (Voltage Channel) MISCAL Input Typical Connection Diagrams INTERNAL OSCILLATOR ANALOG-TO-DIGITAL CONVERSION Antialias Filter ACTIVE POWER CALCULATION Power Factor Considerations Nonsinusoidal Voltage and Current HPF and Offset Effects DIGITAL-TO-FREQUENCY CONVERSION TRANSFER FUNCTION Frequency Output F1 and Frequency Output F2 Frequency Output CF FAULT DETECTION Fault with Active Input Greater Than Inactive Input Fault with Inactive Input Greater Than Active Input Calibration Concerns MISSING NEUTRAL MODE Important Note for Billing of Active Energy Missing Neutral Detection Missing Neutral Gain Calibration APPLICATIONS INFORMATION INTERFACING TO A MICROCONTROLLER FOR ENERGY MEASUREMENT SELECTING A FREQUENCY FOR AN ENERGY METER APPLICATION Frequency Outputs No-Load Threshold NEGATIVE POWER INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE