Datasheet LT8619, LT8619-5 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 60V, 1.2A Synchronous Monolithic Buck Regulator with 6μA Quiescent Current |
| Pages / Page | 28 / 10 — PIN FUNCTIONS (DFN/MSOP) NC (Pin 1, 3, 13, MSOP Only):. FB (Pin 6/Pin 9, … |
| Revision | A |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
PIN FUNCTIONS (DFN/MSOP) NC (Pin 1, 3, 13, MSOP Only):. FB (Pin 6/Pin 9, 10, LT8619 Only):. IN (Pin 1/Pin 2):
Model Line for this Datasheet
LT8619
Text Version of Document
LT8619/LT8619-5
PIN FUNCTIONS (DFN/MSOP) NC (Pin 1, 3, 13, MSOP Only):
No Connect. These pins
FB (Pin 6/Pin 9, 10, LT8619 Only):
The LT8619 regulates are not connected to the internal circuitry. the FB pin to 0.8V. Connect the feedback resistor divider
V
tap to this pin. Also, connect a phase lead capacitor
IN (Pin 1/Pin 2):
The VIN pin supplies current to the LT8619 internal circuitry and to the internal topside power between FB and VOUT. Typically, this capacitor is between switch. Be sure to place the positive terminal of the input 4.7pF to 10pF. Do not apply an external voltage to this pin. bypass capacitor as close as possible to the VIN pin, and
OUT (Pin 9, 10, LT8619-5 MSOP Only):
Connect to the the negative capacitor terminal as close as possible to regulator output VOUT. The LT8619-5 regulates the OUT the GND pin. pin to 5V. This pin connects to the internal 10MΩ feed-
EN/UV (Pin 2/Pin 4):
The LT8619 is shut down when this back divider that programs the fixed output voltage. pin is low and active when this pin is high. The EN/UV pin
BIAS (Pin 7/Pin 11):
The internal regulator will draw cur- power-on threshold is 1V. When forced below 0.56V, the rent from BIAS instead of VIN when the BIAS pin is tied IC is put into a low current shutdown mode. Tie to VIN if to a voltage higher than 3.1V. For switching regulator shutdown feature is not used. An external resistor divider output voltages of 3.3V and above, this pin should be tied from VIN can be used to program the VIN UVLO. to VOUT. If this pin is tied to a supply other than VOUT, use
RT (Pin 3/Pin 5):
A resistor is tied between RT and ground a 1μF local bypass capacitor on this pin. to set the switching frequency. When synchronizing, the
INTVCC (Pin 8/Pin 12):
Internal 3.3V Regulator Output. RT resistor should be chosen to set the LT8619 switch- The internal power drivers and control circuits are pow- ing frequency equal to or below the synchronization fre- ered from this voltage. INTVCC maximum output current quency. Do not apply external voltage to this pin. is 20mA. INTVCC current will be supplied from BIAS if
PG (Pin 4/Pin 6):
Open-Drain Power Good Output. PG VBIAS > 3.1V, otherwise current will be drawn from VIN. remains low until the FB pin is within ±7.5% of the final Voltage on INTVCC will vary between 2.8V and 3.3V when regulation voltage. The PG pull-up resistor can be con- VBIAS is between 3.0V and 3.5V. Decouple this pin to GND nected to the INTV with at least a 1μF low ESR ceramic capacitor. Do not load CC, VOUT or an external supply voltage that is lower than 6V. the INTVCC pin with external circuitry.
SYNC (Pin 5/Pin 7):
External Clock Synchronization Input.
BST (Pin 9/Pin 14):
This pin is used to provide a drive Tie to a clock source for synchronization to an external voltage, higher than the input voltage, to the topside frequency. During clock synchronization, the controller power switch. Place a 0.1μF boost capacitor as close as enters forced continuous mode. Ground the SYNC pin for possible to the IC. Burst Mode operation. Connect to INTVCC to enable forced
SW (Pin 10/Pin 15, 16):
The SW pin is the output of the continuous mode operation. Floating this pin will enable internal power switches. Connect this pin to the inductor pulse-skipping mode operation. During start-up, the con- and boost capacitor. This node should be kept small on troller is forced to run in pulse-skipping mode. When in the PCB for good performance. pulse-skipping or forced continuous mode operation, the
GND (Exposed Pad Pin 11/Pin 8, Exposed Pad Pin 17):
IQ will be much higher compared to Burst Mode operation. Ground. The exposed pad must be connected to the nega- tive terminal of the input capacitor and soldered to the PCB in order to lower the thermal resistance. Rev A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Revision History Typical Application Related Parts
PIN FUNCTIONS (DFN/MSOP) NC (Pin 1, 3, 13, MSOP Only):
No Connect. These pins
FB (Pin 6/Pin 9, 10, LT8619 Only):
The LT8619 regulates are not connected to the internal circuitry. the FB pin to 0.8V. Connect the feedback resistor divider
V
tap to this pin. Also, connect a phase lead capacitor
IN (Pin 1/Pin 2):
The VIN pin supplies current to the LT8619 internal circuitry and to the internal topside power between FB and VOUT. Typically, this capacitor is between switch. Be sure to place the positive terminal of the input 4.7pF to 10pF. Do not apply an external voltage to this pin. bypass capacitor as close as possible to the VIN pin, and
OUT (Pin 9, 10, LT8619-5 MSOP Only):
Connect to the the negative capacitor terminal as close as possible to regulator output VOUT. The LT8619-5 regulates the OUT the GND pin. pin to 5V. This pin connects to the internal 10MΩ feed-
EN/UV (Pin 2/Pin 4):
The LT8619 is shut down when this back divider that programs the fixed output voltage. pin is low and active when this pin is high. The EN/UV pin
BIAS (Pin 7/Pin 11):
The internal regulator will draw cur- power-on threshold is 1V. When forced below 0.56V, the rent from BIAS instead of VIN when the BIAS pin is tied IC is put into a low current shutdown mode. Tie to VIN if to a voltage higher than 3.1V. For switching regulator shutdown feature is not used. An external resistor divider output voltages of 3.3V and above, this pin should be tied from VIN can be used to program the VIN UVLO. to VOUT. If this pin is tied to a supply other than VOUT, use
RT (Pin 3/Pin 5):
A resistor is tied between RT and ground a 1μF local bypass capacitor on this pin. to set the switching frequency. When synchronizing, the
INTVCC (Pin 8/Pin 12):
Internal 3.3V Regulator Output. RT resistor should be chosen to set the LT8619 switch- The internal power drivers and control circuits are pow- ing frequency equal to or below the synchronization fre- ered from this voltage. INTVCC maximum output current quency. Do not apply external voltage to this pin. is 20mA. INTVCC current will be supplied from BIAS if
PG (Pin 4/Pin 6):
Open-Drain Power Good Output. PG VBIAS > 3.1V, otherwise current will be drawn from VIN. remains low until the FB pin is within ±7.5% of the final Voltage on INTVCC will vary between 2.8V and 3.3V when regulation voltage. The PG pull-up resistor can be con- VBIAS is between 3.0V and 3.5V. Decouple this pin to GND nected to the INTV with at least a 1μF low ESR ceramic capacitor. Do not load CC, VOUT or an external supply voltage that is lower than 6V. the INTVCC pin with external circuitry.
SYNC (Pin 5/Pin 7):
External Clock Synchronization Input.
BST (Pin 9/Pin 14):
This pin is used to provide a drive Tie to a clock source for synchronization to an external voltage, higher than the input voltage, to the topside frequency. During clock synchronization, the controller power switch. Place a 0.1μF boost capacitor as close as enters forced continuous mode. Ground the SYNC pin for possible to the IC. Burst Mode operation. Connect to INTVCC to enable forced
SW (Pin 10/Pin 15, 16):
The SW pin is the output of the continuous mode operation. Floating this pin will enable internal power switches. Connect this pin to the inductor pulse-skipping mode operation. During start-up, the con- and boost capacitor. This node should be kept small on troller is forced to run in pulse-skipping mode. When in the PCB for good performance. pulse-skipping or forced continuous mode operation, the
GND (Exposed Pad Pin 11/Pin 8, Exposed Pad Pin 17):
IQ will be much higher compared to Burst Mode operation. Ground. The exposed pad must be connected to the nega- tive terminal of the input capacitor and soldered to the PCB in order to lower the thermal resistance. Rev A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Revision History Typical Application Related Parts
