Datasheet LT3668 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 40V 400mA Step-Down Switching Regulator with Dual Fault Protected Tracking LDOs |
| Pages / Page | 28 / 10 — PIN FUNCTIONS. SW (Pin 1):. EN2/ILIM2 (Pin 12), EN3/ILIM3 (Pin 13):. … |
| File Format / Size | PDF / 386 Kb |
| Document Language | English |
PIN FUNCTIONS. SW (Pin 1):. EN2/ILIM2 (Pin 12), EN3/ILIM3 (Pin 13):. BOOST (Pin 2):. EN (Pin 3):. RT (Pin 4):. PG (Pin 14):
Model Line for this Datasheet
Text Version of Document
LT3668
PIN FUNCTIONS SW (Pin 1):
The SW pin is the output of the internal power
EN2/ILIM2 (Pin 12), EN3/ILIM3 (Pin 13):
Precision cur- switch. Connect this pin to the inductor, the catch diode rent limit programming pins. They connect to collectors and the boost capacitor. of current mirror PNPs which are 1/799th the size of the
BOOST (Pin 2):
This pin is used to provide a drive volt- output power PNPs of the two LDOs. These pins are also age, higher than the input voltage, to the internal bipolar the inputs to the current limit amplifiers. Current limit NPN power switch of the switching regulator. Connect thresholds are set by connecting resistors between the a capacitor (typically 0.22μF) between BOOST and SW. EN2/ILIM2 pin and GND and between the EN3/ILIM3 pin and GND. Stability requirements demand 47nF capacitors in
EN (Pin 3):
The EN pin is used to put the LT3668 in shut- parallel to these resistors. For detailed information on how down mode. Tie to ground to shut down the LT3668. Tie to set the pin resistor values, see the Operation section. If to 1V or more for normal operation. If the EN pin is to be any of these pins is not used, tie it to GND. To disable an pulled below ground, use a series resistor to limit the pin LDO, pull its EN/ILIM pin above 1.2V. If an EN/ILIM pin current to 1mA. is used as a digital input for enable/disable, ensure rise
RT (Pin 4):
Oscillator Resistor Input. Connect a resistor and fall times of less than 1µs. from this pin to ground to set the switching frequency.
PG (Pin 14):
The PG pin is the open-drain output of an
OUT3 (Pin 6), OUT2 (Pin 10):
These are the outputs of internal window comparator. PG remains low until the the two LDOs. Stability requirements demand a minimum FB1 pin is within ±10% of its final regulation voltage. PG 10μF ceramic output capacitor to prevent oscillations. output is valid when VIN1 or VIN2 are above the minimum input voltage and EN is high.
ADJ3 (Pin 9), ADJ2 (Pin 7):
The two LDOs of the LT3668 regulate their outputs to follow the voltages at the ADJ2
IN1 (Pin 15):
The IN1 pin supplies current to the internal and ADJ3 pins. Connect the reference voltage to these pins. regulator and to the internal power switch. This pin must be locally bypassed.
FB1 (Pin 8):
The switching regulator of the LT3668 regu- lates the FB1 pin to 1.2V. Connect the feedback resistor
DA (Pin 16):
Connect the anode of the catch diode (D1 divider tap to this pin. in Block Diagram) to this pin. Internal circuitry senses the current through the catch diode providing frequency
IN2 (Pin 11), IN3/BD (Pin 5):
These pins are the inputs foldback in overload conditions. of the two LDOs. IN3/BD also connects to the anode of the internal boost diode and also supplies current to the
GND (Exposed Pad Pin 17):
This is the ground of all internal LT3668’s internal regulator when IN3/BD is above 3.2V. circuitry, as well as the power ground used by the catch diode (D1). The exposed pad must be soldered to the PCB. 3668fa 10 For more information www.linear.com/LT3668 Document Outline Features Applications Description Typical Application Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Related Parts
PIN FUNCTIONS SW (Pin 1):
The SW pin is the output of the internal power
EN2/ILIM2 (Pin 12), EN3/ILIM3 (Pin 13):
Precision cur- switch. Connect this pin to the inductor, the catch diode rent limit programming pins. They connect to collectors and the boost capacitor. of current mirror PNPs which are 1/799th the size of the
BOOST (Pin 2):
This pin is used to provide a drive volt- output power PNPs of the two LDOs. These pins are also age, higher than the input voltage, to the internal bipolar the inputs to the current limit amplifiers. Current limit NPN power switch of the switching regulator. Connect thresholds are set by connecting resistors between the a capacitor (typically 0.22μF) between BOOST and SW. EN2/ILIM2 pin and GND and between the EN3/ILIM3 pin and GND. Stability requirements demand 47nF capacitors in
EN (Pin 3):
The EN pin is used to put the LT3668 in shut- parallel to these resistors. For detailed information on how down mode. Tie to ground to shut down the LT3668. Tie to set the pin resistor values, see the Operation section. If to 1V or more for normal operation. If the EN pin is to be any of these pins is not used, tie it to GND. To disable an pulled below ground, use a series resistor to limit the pin LDO, pull its EN/ILIM pin above 1.2V. If an EN/ILIM pin current to 1mA. is used as a digital input for enable/disable, ensure rise
RT (Pin 4):
Oscillator Resistor Input. Connect a resistor and fall times of less than 1µs. from this pin to ground to set the switching frequency.
PG (Pin 14):
The PG pin is the open-drain output of an
OUT3 (Pin 6), OUT2 (Pin 10):
These are the outputs of internal window comparator. PG remains low until the the two LDOs. Stability requirements demand a minimum FB1 pin is within ±10% of its final regulation voltage. PG 10μF ceramic output capacitor to prevent oscillations. output is valid when VIN1 or VIN2 are above the minimum input voltage and EN is high.
ADJ3 (Pin 9), ADJ2 (Pin 7):
The two LDOs of the LT3668 regulate their outputs to follow the voltages at the ADJ2
IN1 (Pin 15):
The IN1 pin supplies current to the internal and ADJ3 pins. Connect the reference voltage to these pins. regulator and to the internal power switch. This pin must be locally bypassed.
FB1 (Pin 8):
The switching regulator of the LT3668 regu- lates the FB1 pin to 1.2V. Connect the feedback resistor
DA (Pin 16):
Connect the anode of the catch diode (D1 divider tap to this pin. in Block Diagram) to this pin. Internal circuitry senses the current through the catch diode providing frequency
IN2 (Pin 11), IN3/BD (Pin 5):
These pins are the inputs foldback in overload conditions. of the two LDOs. IN3/BD also connects to the anode of the internal boost diode and also supplies current to the
GND (Exposed Pad Pin 17):
This is the ground of all internal LT3668’s internal regulator when IN3/BD is above 3.2V. circuitry, as well as the power ground used by the catch diode (D1). The exposed pad must be soldered to the PCB. 3668fa 10 For more information www.linear.com/LT3668 Document Outline Features Applications Description Typical Application Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Related Parts
