Datasheet LT3991, LT3991-3.3, LT3991-5 (Analog Devices) - 10

LT3991/LT3991-3.3/LT3991-5
applicaTions inForMaTion
performance of the LT3991. The feedback resistors should quiescent current will significantly increase to 1.5mA in preferably be on the order of MΩ and the Schottky catch light load situations when synchronized with an external diode should have less than 1µA of typical reverse leak- clock. Holding the SYNC pin high yields no advantages in age at room temperature. These two considerations are terms of output ripple or minimum load to full frequency, reiterated in the FB Resistor Network and Catch Diode so is not recommended. Selection sections.
FB Resistor Network
It is important to note that another way to decrease the pulse frequency is to increase the magnitude of each The output voltage is programmed with a resistor divider single current pulse. However, this increases the output between the output and the FB pin. Choose the resistor voltage ripple because each cycle delivers more power to values according to: the output capacitor. The magnitude of the current pulses was selected to ensure less than 15mV of output ripple in ⎛ V R1 ⎞ = R2 OUT ⎜ −1⎟ a typical application. See Figure 2. ⎝1.19V ⎠ Reference designators refer to the Block Diagram. 1% VSW 5V/DIV resistors are recommended to maintain output voltage accuracy. The total resistance of the FB resistor divider should be IL 500mA/DIV selected to be as large as possible to enhance low current performance. The resistor divider generates a small load VOUT on the output, which should be minimized to optimize the 20mV/DIV low supply current at light loads. 5µs/DIV 3991 F02 VIN = 48V When using large FB resistors, a 10pF phase lead capacitor VOUT = 3.3V I should be connected from V LOAD = 20mA OUT to FB. The LT3991-3.3 and LT3991-5 control an internal 10M FB
Figure 2. Burst Mode Operation
resistor divider as well as an internal lead capacitor. While in Burst Mode operation, the burst frequency and the charge delivered with each pulse will not change with output
Setting the Switching Frequency
capacitance. Therefore, the output voltage ripple wil be The LT3991 uses a constant frequency PWM architecture inversely proportional to the output capacitance. In a typical that can be programmed to switch from 200kHz to 2MHz application with a 47μF output capacitor, the output ripple by using a resistor tied from the RT pin to ground. A table is about 8mV, and with a 100μF output capacitor the output showing the necessary RT value for a desired switching ripple is about 4mV. The output voltage ripple can continue frequency is in Table 1. to be decreased by increasing the output capacitance.
Table 1. Switching Frequency vs RT Value
At higher output loads (above 86mA for the front page
SWITCHING FREQUENCY (MHz) RT VALUE (kΩ)
application) the LT3991 will be running at the frequency 0.2 255 programmed by the RT resistor, and will be operating in 0.4 118 standard PWM mode. The transition between PWM and low 0.6 71.5 0.8 49.9 ripple Burst Mode operation will exhibit slight frequency 1.0 35.7 jitter, but will not disturb the output voltage. 1.2 28.0 1.4 22.1 To ensure proper Burst Mode operation, the SYNC pin 1.6 17.4 1.8 14.0 must be grounded. When synchronized with an exter- 2.0 11.0 nal clock, the LT3991 will pulse skip at light loads. The 3991fa 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts