Datasheet LT1074, LT1076 (Analog Devices) - 5

LT1074/LT1076
W U BLOCK DIAGRA DESCRIPTIO
A switch cycle in the LT1074 is initiated by the oscillator voltages by feeding the FB signal into the oscillator and setting the R/S latch. The pulse that sets the latch also creating a linear frequency downshift when the FB signal locks out the switch via gate G1. The effective width of this drops below 1.3V. Current trip level is set by the voltage on pulse is approximately 700ns, which sets the maximum the ILIM pin which is driven by an internal 320µA current switch duty cycle to approximately 93% at 100kHz switch- source. When this pin is left open, it self-clamps at about ing frequency. The switch is turned off by comparator C1, 4.5V and sets current limit at 6.5A for the LT1074 and 2.6A which resets the latch. C1 has a sawtooth waveform as one for the LT1076. In the 7-pin package an external resistor input and the output of an analog multiplier as the other can be connected from the ILIM pin to ground to set a lower input. The multiplier output is the product of an internal current limit. A capacitor in parallel with this resistor will reference voltage, and the output of the error amplifier, A1, soft-start the current limit. A slight offset in C2 guarantees divided by the regulator input voltage. In standard buck that when the ILIM pin is pulled to within 200mV of ground, regulators, this means that the output voltage of A1 C2 output will stay high and force switch duty cycle to zero. required to keep a constant regulated output is indepen- The “Shutdown” pin is used to force switch duty cycle to dent of regulator input voltage. This greatly improves line zero by pulling the I transient response, and makes loop gain independent of LIM pin low, or to completely shut down the regulator. Threshold for the former is approximately input voltage. The error amplifier is a transconductance 2.35V, and for complete shutdown, approximately 0.3V. type with a GM at null of approximately 5000µmho. Slew Total supply current in shutdown is about 150µA. A 10µA current going positive is 140µA, while negative slew pull-up current forces the shutdown pin high when left current is about 1.1mA. This asymmetry helps prevent open. A capacitor can be used to generate delayed start- overshoot on start-up. Overall loop frequency compensa- up. A resistor divider will program “undervoltage lockout” tion is accomplished with a series RC network from VC to if the divider voltage is set at 2.35V when the input is at the ground. desired trip point. Switch current is continuously monitored by C2, which The switch used in the LT1074 is a Darlington NPN (single resets the R/S latch to turn the switch off if an overcurrent NPN for LT1076) driven by a saturated PNP. Special condition occurs. The time required for detection and patented circuitry is used to drive the PNP on and off very switch turn off is approximately 600ns. So minimum quickly even from the saturation state. This particular switch “on” time in current limit is 600ns. Under dead switch arrangement has no “isolation tubs” connected to shorted output conditions, switch duty cycle may have to the switch output, which can therefore swing to 40V below be as low as 2% to maintain control of output current. This ground. would require switch on time of 200ns at 100kHz switch- ing frequency, so frequency is reduced at very low output sn1074 1074fds 5