Datasheet RH101A (Analog Devices) - 2

DICE/DWF SPECIFICATION RH101A
W DICE ELECTRICAL TEST LI ITS TA = 25
°
C. VS =
±
20V unless otherwise noted. 10Krad(SI) 20Krad(SI) 50Krad(SI) 100Krad(SI) 200Krad(SI) SYMBOL PARAMETER CONDITIONS MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS Post-Irradiation (Note 4)
VOS Input Offset Voltage RS ≤ 50k 2 2 2 2 3 mV IOS Input Offset Current 10 10 10 10 20 nA IB Input Bias Current 75 75 100 200 400 nA CMRR Common Mode VCM = ±15V, RS ≤ 50k 80 80 80 80 80 dB Rejection Ratio PSRR Power Supply VCM = ±5V to ±20V, 80 80 80 80 80 dB Rejection Ratio RS ≤ 50k AVOL Large Signal Voltage Gain RL = ±2k, VO = ±10V, 50 50 50 50 25 V/mV VS = ±15V VOUT Maximumm Output VS = ±15V, RL ≥ 10k ±12 ±12 ±12 ±12 ±12 V Voltage Swing VS = ±15V, RL ≥ 2k ±10 ±10 ±10 ±10 ±10 V IS Supply Current VS = ±20V 3 3 3 3 3 mA
Note 1:
Unless otherwise noted, all measurements are made with unity
Note 3:
Refer to LTC standard product data sheet for all other applicable gain compensation (C1 = 30pF); these specifications apply for ±5V ≤ VS ≤ information. 20V.
Note 4:
The post-irradiation table is for lot qualification based on sample
Note 2:
For supply voltages less than ±15V, the maximum input voltage is lot assembly and testing only. Contact LTC marketing for more detail. equal to the supply voltage. Wafer level testing is performed per the indicated specifications for dice. Considerable differences in performance can often be observed for dice versus packaged units due to the influences of packaging and assembly on certain devices and/or parameters. Please consult factory for more information on dice performance and lot qualifications via lot sampling test procedures. Dice data sheet subject to change. Please consult factory for current revision in production. I.D.No. 66-13-0101 LT/LT 0203 PRINTED IN USA 2 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2003