Datasheet LT1193 (Analog Devices) - 8

ManufacturerAnalog Devices
DescriptionVideo Difference Amplifier
Pages / Page12 / 8 — APPLICATIO S I FOR ATIO. Settling Time Poor Bypass. Settling Time Good …
File Format / SizePDF / 448 Kb
Document LanguageEnglish

APPLICATIO S I FOR ATIO. Settling Time Poor Bypass. Settling Time Good Bypass. No Supply Bypass Capacitors

APPLICATIO S I FOR ATIO Settling Time Poor Bypass Settling Time Good Bypass No Supply Bypass Capacitors

Model Line for this Datasheet

Text Version of Document

LT1193
U U W U APPLICATIO S I FOR ATIO
SHDN SHDN
Settling Time Poor Bypass
V + V + 5 5 3 3 V 7 IN + 7 + 2 2 – 6 VIN – LT1193 6 1 LT1193 OUT V 1 VOUT +/REF +/REF 8 8 –/FB 4 –/FB 4 V – V – R V FB RFB OUT VOUT 1V/DIV 0V 0V 10mV/DIV R R R R G A FB + RG G A FB + RG V = + V = – R R G G SHDN SHDN V + V + 5 5 3 7 + 3 7 + LT1192 • TA05 VINDIFF 2 V 2 – INDIFF SETTLING TIME TO 10mV, A 6 – V = 2 LT1193 6 1 V LT1193 OUT 1 VOUT SUPPLY BYPASS CAPACITORS = 0.1µF V +/REF R +/REF IN 8 G 8 –/FB V 4 IN –/FB 4
Settling Time Good Bypass
V – V – RFB RFB R V FB + RG O = (VINDIFF + VIN) R R R G FB + RG FB V R O = G ( V ( R INDIFF – VIN G RG LT1193 • TA03
No Supply Bypass Capacitors
VOUT 0V 0V VOUT 1V/DIV 10mV/DIV LT1192 • TA06 SETTLING TIME TO 10mV, AV = 2 SUPPLY BYPASS CAPACITORS = 0.1µF + 4.7µF TANTALUM
Operating With Low Closed-Loop Gains
The LT1193 has been optimized for closed-loop gains of 2 or greater; the frequency response illustrates the ob- LT1192 • TA04 A tainable closed-loop bandwidths. For a closed-loop gain V = 10, IN DEMO BOARD, RL = 1k of 2 the response peaks about 2dB. Peaking can be In many applications and those requiring good settling minimized by keeping the feedback elements below 1kΩ, time it is important to use multiple bypass capacitors. A and can be eliminated by placing a capacitor across the 0.1µF ceramic disc in parallel with a 4.7µF tantalum is feedback resistor, (feedback zero). This peaking shows recommended. Two oscilloscope photos with different up as time domain overshoot of about 40%. With the bypass conditions are used to illustrate the settling time feedback capacitor it is eliminated. characteristics of the amplifier. Note that although the output waveform looks acceptable at 1V/DIV, when ampli-
Cable Terminations
fied to 10mV/DIV the settling time to 10mV is 347ns for the The LT1193 video difference amplifier has been optimized 0.1µF bypass; the time drops to 96ns with multiple bypass as a low cost cable driver. The ±50mA guaranteed output capacitors. current enables the LT1193 to easily deliver 7.5VP-P into 1193fb 8