Datasheet LTC3626 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 20V, 2.5A Synchronous Monolithic Step-Down Regulator with Current and Temperature Monitoring |
| Pages / Page | 28 / 9 — pin FuncTions ITH (Pin 11):. PGOOD (Pin 18):. RT (Pin 12):. SW (Pins 19, … |
| File Format / Size | PDF / 398 Kb |
| Document Language | English |
pin FuncTions ITH (Pin 11):. PGOOD (Pin 18):. RT (Pin 12):. SW (Pins 19, 20):. RUN (Pin 13):. PGND (Exposed Pad Pin 21):
Model Line for this Datasheet
Text Version of Document
LTC3626
pin FuncTions ITH (Pin 11):
Error Amplifier Output and Switching Regula-
PGOOD (Pin 18):
Open-Drain Power Good Output Pin. tor Compensation Point. Connect this pin to appropriate PGOOD is pulled to ground when the voltage at the FB pin external components to compensate the regulator loop is not within ±8% (typical) of the internal 0.6V reference. frequency response. Connect this pin to INTVCC to use PGOOD becomes high impedance once the voltage at the default internal compensation. the FB pin returns to within ±5% (typical) of the internal
RT (Pin 12):
Oscillator Frequency Program Pin. Connect reference. an external resistor, between 640k to 105k, from this pin
SW (Pins 19, 20):
Switch Node Connection to Inductor. to SGND to program the LTC3626 switching frequency Connect this pin to the SW side of the external inductor. from 500kHz to 3MHz. When RT is tied to INTVCC, the The normal operation voltage swing of this pin ranges switching frequency will default to 2MHz (typical). from ground to PVIN.
RUN (Pin 13):
Regulator Enable Pin. Enables chip opera-
PGND (Exposed Pad Pin 21):
Power Ground Pin. The (–) tion by applying a voltage above 1.25V. A voltage below terminal of the input bypass capacitor, CIN, and the (–) of 1.0V on this pin places the part into shutdown. Do not the output capacitor, COUT, should be tied to this pin with float this pin. a low impedance connection. This pin must be soldered
SV
to the PCB to provide low impedance electrical contact to
IN (Pin 14):
Signal Power Supply Input. This pin sup- plies current to the internal 3.3V regulator. ground and good thermal contact to the PCB.
PVIN (Pins 15, 16):
Main Power Supply Input. These pins should be closely decoupled to PGND with a low ESR capacitor of value 10µF or more.
MODE/SYNC (Pin 17):
Mode Selection and External Synchronization Input. This pin places the LTC3626 into forced continuous operation when tied to ground. High efficiency Burst Mode operation is enabled by either floating this pin or tying this pin to INTVCC. When driven with an external clock, an internal phase-locked loop will synchronize the phase and frequency of the internal oscillator to that of incoming clock signal. During external clock synchronization, the LTC3626 will default to forced continuous operation. 3626fa For more information www.linear.com/LTC3626 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions ITH (Pin 11):
Error Amplifier Output and Switching Regula-
PGOOD (Pin 18):
Open-Drain Power Good Output Pin. tor Compensation Point. Connect this pin to appropriate PGOOD is pulled to ground when the voltage at the FB pin external components to compensate the regulator loop is not within ±8% (typical) of the internal 0.6V reference. frequency response. Connect this pin to INTVCC to use PGOOD becomes high impedance once the voltage at the default internal compensation. the FB pin returns to within ±5% (typical) of the internal
RT (Pin 12):
Oscillator Frequency Program Pin. Connect reference. an external resistor, between 640k to 105k, from this pin
SW (Pins 19, 20):
Switch Node Connection to Inductor. to SGND to program the LTC3626 switching frequency Connect this pin to the SW side of the external inductor. from 500kHz to 3MHz. When RT is tied to INTVCC, the The normal operation voltage swing of this pin ranges switching frequency will default to 2MHz (typical). from ground to PVIN.
RUN (Pin 13):
Regulator Enable Pin. Enables chip opera-
PGND (Exposed Pad Pin 21):
Power Ground Pin. The (–) tion by applying a voltage above 1.25V. A voltage below terminal of the input bypass capacitor, CIN, and the (–) of 1.0V on this pin places the part into shutdown. Do not the output capacitor, COUT, should be tied to this pin with float this pin. a low impedance connection. This pin must be soldered
SV
to the PCB to provide low impedance electrical contact to
IN (Pin 14):
Signal Power Supply Input. This pin sup- plies current to the internal 3.3V regulator. ground and good thermal contact to the PCB.
PVIN (Pins 15, 16):
Main Power Supply Input. These pins should be closely decoupled to PGND with a low ESR capacitor of value 10µF or more.
MODE/SYNC (Pin 17):
Mode Selection and External Synchronization Input. This pin places the LTC3626 into forced continuous operation when tied to ground. High efficiency Burst Mode operation is enabled by either floating this pin or tying this pin to INTVCC. When driven with an external clock, an internal phase-locked loop will synchronize the phase and frequency of the internal oscillator to that of incoming clock signal. During external clock synchronization, the LTC3626 will default to forced continuous operation. 3626fa For more information www.linear.com/LTC3626 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
