Datasheet ADP2381 (Analog Devices)

20 V, 6 A Synchronous Step-Down Regulator with Low-Side Driver Data Sheet ADP2381 FEATURES TYPICAL APPLICATIONS CIRCUIT Input voltage: 4.5 V to 20 V VIN 1 16 Integrated 44 mΩ high-side MOSFET PVIN BST C L 2 V C 15 BST OUT 0.6 V ± 1% reference voltage over temperature IN PVIN SW 3 14 C Continuous output current: 6 A UVLO OUT ADP2381 SW 4 13 FET Programmable switching frequency: 250 kHz to 1.4 MHz PGOOD LD 5 12 Synchronizes to external clock: 250 kHz to 1.4 MHz RT VREG CVREG ROSC 180° out-of-phase synchronization 6 11 SYNC PGND Programmable UVLO 7 10 EN/SS GND RTOP Power-good output CSS 8 9 COMP FB External compensation RBOT Internal soft start with external adjustable option CC_EA RC_EA Startup into a precharged output
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Supported by ADIsimPower design tool CCP_EA
10209-
APPLICATIONS
Figure 1.
Communication infrastructure 100 Networking and servers 95 Industrial and instrumentation 90 Healthcare and medical 85 Intermediate power rail conversion %) ( 80 DC-to-dc point of load application NCY 75 E ICI F 70 F E 65 60 VOUT = 3.3V V 55 OUT = 5V VOUT = 1.2V 50 0 1 2 3 4 5 6
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OUTPUT CURRENT (A)
10209- Figure 2. ADP2381 Efficiency vs. Output Current, VIN = 12 V, fSW = 250 kHz
GENERAL DESCRIPTION
The ADP2381 is a current mode control, synchronous, step- External compensation and an adjustable soft start provide down, dc-to-dc regulator. It integrates a 44 mΩ power MOSFET design flexibility. The power-good output provides simple and and a low-side driver to provide a high efficiency solution. The reliable power sequencing. Additional features include ADP2381 runs from an input voltage of 4.5 V to 20 V and can programmable undervoltage lockout (UVLO), overvoltage deliver 6 A of output current. The output voltage can be protection (OVP), overcurrent protection (OCP), and thermal adjusted to 0.6 V to 90% of the input voltage. The switching shutdown (TSD). frequency of the ADP2381 can be programmed from The ADP2381 operates over the −40°C to +125°C junction 250 kHz to 1.4 MHz or fixed at 290 kHz or 550 kHz. The temperature range and is available in a 16-lead TSSOP_EP synchronization function allows the switching frequency to be package. synchronized to an external clock to minimize system noise.
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Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Schematic of Design Example External Components Recommendation Circuit Board Layout Recommendations Typical Application Circuits Outline Dimensions Ordering Guide