Datasheet ADP2370, ADP2371 (Analog Devices) - 4

ManufacturerAnalog Devices
DescriptionHigh Voltage, 1.2 MHz/600 kHz, 800 mA, Low Quiescent Current Buck Regulator with Quick Output Discharge Function
Pages / Page32 / 4 — ADP2370/ADP2371. Data Sheet. Parameter. Symbol. Test Conditions/Comments. …
RevisionD
File Format / SizePDF / 3.5 Mb
Document LanguageEnglish

ADP2370/ADP2371. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

ADP2370/ADP2371 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit

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ADP2370/ADP2371 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OSCILLATOR Oscillator Frequency fOSC FSEL = VIN, 3.2 V ≤ VIN ≤ 15 V 1.0 1.2 1.4 MHz FSEL = 0 V, 3.2 V ≤ VIN ≤ 15 V 500 600 700 kHz Frequency Synchronization Range fSYNC_RANGE FSEL = 0 V, 3.2 V ≤ VIN ≤ 15 V 400 800 kHz FSEL = VIN, 3.2 V ≤ VIN ≤ 15 V 0.8 1.6 MHz Synchronization Threshold High SYNCHIGH 3.2 V ≤ VIN ≤ 15 V 1.2 V Low SYNCLOW 3.2 V ≤ VIN ≤ 15 V 0.4 V Hysteresis SYNCHYS 3.2 V ≤ VIN ≤ 15 V 200 mV Typical Sync Duty Cycle Range SYNCDUTY VIN (1.2 MHz), 3.2 V ≤ VIN ≤ 5 V, FSEL = VIN 20 55 % VIN (1.2 MHz), 5 V ≤ VIN ≤ 15 V, FSEL = VIN 20 70 % SYNC Pin Leakage Current SYNCLKG SYNC = 0 V or SYNC = VIN 0.05 1 μA FSEL Threshold 3.2 V ≤ VIN ≤ 15 V High FESLHIGH 1 V Low FSELLOW 0.4 V Hysteresis FSELHYS 125 mV FSEL Pin Leakage Current FSELLKG FSEL = 0 V or FSEL = VIN 0.04 1 μA POWER GOOD (PG PIN) PG Threshold 3.2 V ≤ VIN ≤ 15 V Rising PGRISE 92 95 % Falling PGFALL 82.5 87 % Hysteresis PGHYS 5 % PG Output Low PGLOW Pull-up current < 1 mA 0.3 V PG Delay Rising PGDELAYRISE VOUT crossing PG rising threshold, pull-up 20 μs current < 1 mA Falling PGDELAYFALL VOUT crossing PG falling threshold, pull-up 0.5 μs current < 1 mA PG Leakage PGLKG 0.04 1 μA UNDERVOLTAGE LOCKOUT (UVLO) Input Voltage Rising UVLORISE 3.19 V Input Voltage Falling UVLOFALL 2.80 V Hysteresis UVLOHYS 190 mV ENABLE INPUT STANDBY (EN PIN) 3.2 V ≤ VIN ≤ 15 V EN Input Logic V High ENSTBY-HIGH 1 Low ENSTBY-LOW 0.4 V Hysteresis ENSTBY-HYS 125 mV ENABLE INPUT PRECISION (EN PIN) 3.2 V ≤ VIN ≤ 15 V EN Input Logic High ENHIGH 1.135 1.2 1.26 V Low ENLOW 1.045 1.1 1.155 V Hysteresis ENHYS 100 mV EN Input Leakage Current IEN-LKG EN = VIN or GND 0.05 1 µA EN Input Delay Time TIEN-DLY For VOUT = 0 V to 0.1 × VOUT when EN rises from 70 μs 0 V to VIN THERMAL SHUTDOWN 3.2 V ≤ VIN ≤ 15 V Thermal Shutdown Threshold TSSD TJ rising 150 °C Thermal Shutdown Hysteresis TSSD-HYS 15 °C Rev. D | Page 4 of 32 Document Outline Features Applications Typical Application Circuit General Description Table of Contents Revision History Specifications Recommended Specifications: Capacitors Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Buck Output Theory of Operation PWM Operation PSM Operation Features Descriptions Precision Enable Forced PWM or PWM/PSM Selection Quick Output Discharge (QOD) Function Short-Circuit Protection Undervoltage Lockout Thermal Protection Soft Start Current Limit 100% Duty Cycle Synchronizing Power Good Applications Information ADIsimPower Design Tool External Component Selection Selecting the Inductor Output Capacitor Input Capacitor Adjustable Output Voltage Programming Efficiency Power Switch Conduction Losses Inductor Losses Switching Losses Transition Losses Recommended Buck External Components Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Thermal Considerations PCB Layout Considerations Packaging and Ordering Information Outline Dimensions Ordering Guide