Datasheet ADP2370, ADP2371 (Analog Devices) - 6

ADP2370/ADP2371 Data Sheet ABSOLUTE MAXIMUM RATINGS
of θJA can vary, depending on PCB material, layout, and
Table 3.
environmental conditions.
Parameter Rating
VIN to PGND and Ground Plane −0.3 V to +17 V The specified values of θJA are based on a 4-layer, 4 in. × 3 in. SW to PGND and Ground Plane −0.7 V to VIN + 0.3 V circuit board. See JESD 51-7, High Effective Thermal Conduc- tivity Test Board for Leaded Surface Mount Packages, for detailed FB to PGND and Ground Plane −0.3 V to +6 V information on board construction. For more information, see EN to PGND and Ground Plane −0.3 V to +17 V Application Note AN-772, A Design and Manufacturing Guide for PG to PGND and Ground Plane −0.3 V to +17 V the Lead Frame Chip Scale Package (LFCSP). SYNC to PGND and Ground Plane −0.3 V to +17 V FSEL to PGND and Ground Plane −0.3 V to +17 V ΨJB is the junction to board thermal characterization parameter Temperature Range with units of °C/W. The ΨJB of the package is based on modeling Storage −65°C to +150°C and calculation using a 4-layer board. The JESD51-12, Guidelines Operating Ambient −40°C to +85°C for Reporting and Using Electronic Package Thermal Information, Operating Junction −40°C to +125°C states that thermal characterization parameters are not the same Soldering Conditions JEDEC J-STD-020 as thermal resistances. ΨJB measures the component power flowing Stresses above those listed under Absolute Maximum Ratings through multiple thermal paths rather than a single path as in thermal resistance, θ may cause permanent damage to the device. This is a stress JB. Therefore, ΨJB thermal paths include convection from the top of the package as wel as radiation rating only; functional operation of the device at these or any from the package, factors that make Ψ other conditions above those indicated in the operational JB more useful in real- world applications. Maximum junction temperature (TJ) is section of this specification is not implied. Exposure to absolute calculated from the board temperature (TB) and power maximum rating conditions for extended periods may affect dissipation (PD) using the formula device reliability. TJ = TB + (PD × ΨJB)
THERMAL DATA
For more detailed information regarding ΨJB, see JESD51-12 Absolute maximum ratings apply individually only, not in com- and JESD51-8, Integrated Circuit Thermal Test Method Envi- bination. Exceeding the junction temperature (TJ) limit can ronmental Conditions—Junction-to-Board. cause damage to the ADP2370/ADP2371. Monitoring ambient temperature does not guarantee that TJ is within the specified
THERMAL RESISTANCE
temperature limits. The maximum ambient temperature may require derating in applications with high power dissipation and θJA and ΨJB are specified for the worst-case conditions, that is, a poor thermal resistance. device soldered in a circuit board for surface-mount packages. θJC is a parameter for surface-mount packages with top mounted In applications with moderate power dissipation and low heat sinks. printed circuit board (PCB) thermal resistance, the maximum ambient temperature can exceed the maximum limit as long
Table 4. Thermal Resistance
as the junction temperature is within specification limits. The
Package Type θJA θJC ΨJB Unit
junction temperature of the device is dependent on the ambient 8-Lead 3 mm × 3 mm LFCSP 36.7 23.5 17.2 °C/W temperature, the power dissipation of the device, and the junction to ambient thermal resistance of the package (θJA).
ESD CAUTION
Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) using the formula TJ = TA + (PD × θJA) Junction-to-ambient thermal resistance (θ JA) of the package is based on modeling and calculation using a 4-layer board. θJA is highly dependent on the application and board layout. In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value Rev. D | Page 6 of 32 Document Outline Features Applications Typical Application Circuit General Description Table of Contents Revision History Specifications Recommended Specifications: Capacitors Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Buck Output Theory of Operation PWM Operation PSM Operation Features Descriptions Precision Enable Forced PWM or PWM/PSM Selection Quick Output Discharge (QOD) Function Short-Circuit Protection Undervoltage Lockout Thermal Protection Soft Start Current Limit 100% Duty Cycle Synchronizing Power Good Applications Information ADIsimPower Design Tool External Component Selection Selecting the Inductor Output Capacitor Input Capacitor Adjustable Output Voltage Programming Efficiency Power Switch Conduction Losses Inductor Losses Switching Losses Transition Losses Recommended Buck External Components Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Thermal Considerations PCB Layout Considerations Packaging and Ordering Information Outline Dimensions Ordering Guide