Datasheet ADP5043 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Micro-PMU with 0.8 A Buck, 300 mA LDO, Supervisory, Watchdog, and Manual Reset |
| Pages / Page | 30 / 3 — Data Sheet. ADP5043. SPECIFICATIONS GENERAL SPECIFICATIONS. Table 1. … |
| Revision | B |
| File Format / Size | PDF / 1.5 Mb |
| Document Language | English |
Data Sheet. ADP5043. SPECIFICATIONS GENERAL SPECIFICATIONS. Table 1. Parameter. Symbol. Test Conditions/Comments. Min Typ Max Unit
Model Line for this Datasheet
Text Version of Document
Data Sheet ADP5043 SPECIFICATIONS GENERAL SPECIFICATIONS
AVIN, VIN1 = (VOUT1 + 0.5 V) or 2.3 V, whichever is greater, AVIN, VIN1 ≥ VIN2, TA = 25°C, unless otherwise noted. Regulators are enabled.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
AVIN UNDERVOLTAGE LOCKOUT UVLOAVIN TJ = −40°C to +125°C Input Voltage Rising UVLOAVINRISE Option A 2.25 V Option B 3.9 V Input Voltage Falling UVLOAVINFALL Option A 1.95 V Option B 3.1 V SHUTDOWN CURRENT IGND-SD ENx = GND 0.1 µA ENx = GND, TJ = −40°C to +125°C 2 µA Thermal Shutdown Threshold TSSD TJ rising 150 °C Thermal Shutdown Hysteresis TSSD-HYS 20 °C ENx, WDIx, MODE, WMOD, MR INPUTS Input Logic High VIH 2.5 V ≤ AVIN ≤ 5.5 V 1.2 V Input Logic Low VIL 2.5 V ≤ AVIN ≤ 5.5 V 0.4 V Input Leakage Current (WMOD Excluded) VI-LEAKAGE ENx = AVIN or GND 0.05 µA ENx = AVIN or GND, TJ = −40°C to +125°C 1 µA WMOD Input Leakage Current VI-LKG-WMOD VWMOD = 3.6 V, TJ = −40°C to +125°C 50 µA OPEN-DRAIN OUTPUTS nRSTO, WSTAT Output Voltage VOL AVIN = 2.3 V to 5.5 V, InRSTO/WSTAT = 3 mA 30 mV Open-Drain Reset Output Leakage Current 1 µA
SUPERVISORY SPECIFICATIONS
AVIN, VIN1 = full operating range, TJ = −40°C to +125°C, unless otherwise noted.
Table 2. Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY Supply Current (Supervisory Circuit Only) 45 55 µA AVIN = 5.5 V, EN1 = EN2 = VIN1 43 52 µA AVIN = 3.6 V, EN1 = EN2 = VIN1 RESET THRESHOLD ACCURACY VTH − 0.8% VTH VTH + 0.8% V TA = 25°C, sensed on VOUTx VTH − 1.5% VTH VTH + 1.5% V TJ = −40°C to +125°C, sensed on VOUTx RESET THRESHOLD TO OUTPUT DELAY 50 125 400 µs VTH = VOUT − 50 mV GLITCH IMMUNITY (tUOD) RESET TIMEOUT PERIOD WATCHDOG1 (tRP1) Option A 24 30 36 ms Option B 160 200 240 ms RESET TIMEOUT PERIOD WATCHDOG2 (tRP2) 3.5 5 7 ms VCC TO RESET DELAY (tRD) 150 µs VIN1 falling at 1 mV/µs REGULATORS SEQUENCING DELAY (tD1, tD2) 2 ms WATCHDOG INPUTS Watchdog 1 Timeout Period (tWD1) Option A 81.6 102 122.4 ms Option B 1.28 1.6 1.92 sec Rev. B | Page 3 of 30 Document Outline FEATURES GENERAL DESCRIPTION HIGH LEVEL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS SUPERVISORY SPECIFICATIONS BUCK SPECIFICATIONS LDO SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION SUPERVISORY SECTION Reset Output Manual Reset Input Watchdog 1 Input Watchdog 2 Input Watchdog Status Indicator APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Inductor Output Capacitor Input Capacitor LDO CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties SUPERVISORY SECTION Watchdog 1 Input Current Negative-Going VCC Transients Watchdog Software Considerations PCB LAYOUT GUIDELINES POWER DISSIPATION/THERMAL CONSIDERATIONS Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature EVALUATION BOARD SCHEMATICS AND ARTWORK SUGGESTED LAYOUT BILL OF MATERIALS APPLICATION DIAGRAM FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
AVIN, VIN1 = (VOUT1 + 0.5 V) or 2.3 V, whichever is greater, AVIN, VIN1 ≥ VIN2, TA = 25°C, unless otherwise noted. Regulators are enabled.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
AVIN UNDERVOLTAGE LOCKOUT UVLOAVIN TJ = −40°C to +125°C Input Voltage Rising UVLOAVINRISE Option A 2.25 V Option B 3.9 V Input Voltage Falling UVLOAVINFALL Option A 1.95 V Option B 3.1 V SHUTDOWN CURRENT IGND-SD ENx = GND 0.1 µA ENx = GND, TJ = −40°C to +125°C 2 µA Thermal Shutdown Threshold TSSD TJ rising 150 °C Thermal Shutdown Hysteresis TSSD-HYS 20 °C ENx, WDIx, MODE, WMOD, MR INPUTS Input Logic High VIH 2.5 V ≤ AVIN ≤ 5.5 V 1.2 V Input Logic Low VIL 2.5 V ≤ AVIN ≤ 5.5 V 0.4 V Input Leakage Current (WMOD Excluded) VI-LEAKAGE ENx = AVIN or GND 0.05 µA ENx = AVIN or GND, TJ = −40°C to +125°C 1 µA WMOD Input Leakage Current VI-LKG-WMOD VWMOD = 3.6 V, TJ = −40°C to +125°C 50 µA OPEN-DRAIN OUTPUTS nRSTO, WSTAT Output Voltage VOL AVIN = 2.3 V to 5.5 V, InRSTO/WSTAT = 3 mA 30 mV Open-Drain Reset Output Leakage Current 1 µA
SUPERVISORY SPECIFICATIONS
AVIN, VIN1 = full operating range, TJ = −40°C to +125°C, unless otherwise noted.
Table 2. Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY Supply Current (Supervisory Circuit Only) 45 55 µA AVIN = 5.5 V, EN1 = EN2 = VIN1 43 52 µA AVIN = 3.6 V, EN1 = EN2 = VIN1 RESET THRESHOLD ACCURACY VTH − 0.8% VTH VTH + 0.8% V TA = 25°C, sensed on VOUTx VTH − 1.5% VTH VTH + 1.5% V TJ = −40°C to +125°C, sensed on VOUTx RESET THRESHOLD TO OUTPUT DELAY 50 125 400 µs VTH = VOUT − 50 mV GLITCH IMMUNITY (tUOD) RESET TIMEOUT PERIOD WATCHDOG1 (tRP1) Option A 24 30 36 ms Option B 160 200 240 ms RESET TIMEOUT PERIOD WATCHDOG2 (tRP2) 3.5 5 7 ms VCC TO RESET DELAY (tRD) 150 µs VIN1 falling at 1 mV/µs REGULATORS SEQUENCING DELAY (tD1, tD2) 2 ms WATCHDOG INPUTS Watchdog 1 Timeout Period (tWD1) Option A 81.6 102 122.4 ms Option B 1.28 1.6 1.92 sec Rev. B | Page 3 of 30 Document Outline FEATURES GENERAL DESCRIPTION HIGH LEVEL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS SUPERVISORY SPECIFICATIONS BUCK SPECIFICATIONS LDO SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION SUPERVISORY SECTION Reset Output Manual Reset Input Watchdog 1 Input Watchdog 2 Input Watchdog Status Indicator APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Inductor Output Capacitor Input Capacitor LDO CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties SUPERVISORY SECTION Watchdog 1 Input Current Negative-Going VCC Transients Watchdog Software Considerations PCB LAYOUT GUIDELINES POWER DISSIPATION/THERMAL CONSIDERATIONS Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature EVALUATION BOARD SCHEMATICS AND ARTWORK SUGGESTED LAYOUT BILL OF MATERIALS APPLICATION DIAGRAM FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
