Datasheet LT3686A (Analog Devices) - 9

ManufacturerAnalog Devices
Description37V/1.2A Step-Down Regulator in 3mm × 3mm DFN and MSE
Pages / Page30 / 9 — operAtion
File Format / SizePDF / 522 Kb
Document LanguageEnglish

operAtion

operAtion

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LT3686A
operAtion
The LT3686A is a current mode step-down regulator. decreases, less current is delivered. An active clamp (not The EN/UVLO pin is used to place the LT3686A in shut- shown) on the VC node provides current limit. down. The 1.28V threshold on the EN/UVLO pin can be The switch driver operates from either V programmed by an external resistor divider (R4, R5) to IN or from the BOOST pin. An external capacitor and the internal boost disable the LT3686A. When the EN/UVLO pin is driven diode are used to generate a voltage at the BOOST pin that above 1.28V, an internal regulator provides power to the is higher than the input supply. This al ows the driver to control circuitry. This regulator includes both overvoltage ful y saturate the internal bipolar NPN power switch for and undervoltage lockout to prevent switching when VIN efficient operation. is more than 37V or less than 3.6V. A comparator monitors the current flowing through the Tracking soft-start is implemented by providing constant catch diode via the DA pin and reduces the LT3686A’s current via the SS pin to an external soft-start capacitor operating frequency when the DA pin current exceeds the (C4) to generate a voltage ramp. FB voltage is regulated 1.7A val ey current limit. This helps to control the output to the voltage at the SS pin until it exceeds 0.8V; FB current in fault conditions such as shorted output with high is then regulated to the reference 0.8V. Soft-start also input voltage. The DA comparator works in conjunction reduces the oscil ator frequency to avoid hitting current with the switch peak current limit comparator to determine limit during start-up. The SS capacitor is reset during the maximum deliverable current of the LT3686A. fault events such as overvoltage, undervoltage, thermal shutdown and startup. The SYNC/MODE pin doubles as mode select for the BD active load circuit. The active load is enabled when An oscil ator is programmed by resistor RT. The oscil ator SYNC/MODE is driven with sync pulses or tied above sets an RS flip-flop, turning on the internal 1.2A power 0.8V and disabled when SYNC/MODE is tied below 0.4V. switch Q1. An amplifier and comparator monitor the cur- The LT3686A will prevent pulse skipping at light loads rent flowing between the VIN and SW pins, turning the by regulating the active load. The active load will assist switch off when this current reaches a level determined by startup by guaranteeing a minimum load to charge the the voltage at VC. An error amplifier measures the output boost capacitor. It also hastens the recharge of boost voltage through an external resistor divider tied to the FB capacitor when operating beyond maximum duty cycle. pin and servos the VC node. If the error amplifier’s output increases, more current is delivered to the output; if it The active load works only when the BD pin is less than 6V. 3686afa 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts