Datasheet LTC3616 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 6A, 4MHz Monolithic Synchronous Step-Down DC/DC Converter |
| Pages / Page | 28 / 9 — pin FuncTions. SRLIM/DDR (Pin 1):. RT/SYNC (Pin 2):. MODE (Pin 21):. VFB … |
| File Format / Size | PDF / 541 Kb |
| Document Language | English |
pin FuncTions. SRLIM/DDR (Pin 1):. RT/SYNC (Pin 2):. MODE (Pin 21):. VFB (Pin 22):. SGND (Pin 3):. ITH (Pin 23):
Model Line for this Datasheet
Text Version of Document
LTC3616
pin FuncTions SRLIM/DDR (Pin 1):
Slew Rate Limit. Tying this pin to FB voltage leaves the power good window for more than ground selects maximum slew rate. Minimum slew rate 100µs the PGOOD pin is pulled down. is selected when the pin is open. Connecting a resistor In DDR mode (DDR = V from SRLIM/DDR to ground allows the slew rate to be IN), the power good window moves in relation to the actual TRACK/SS pin voltage. During continuously adjusted. If SRLIM/DDR is tied to SVIN, DDR up/down tracking the PGOOD pin is always pulled down. mode is selected. In DDR mode the slew rate limit is set to maximum. In shutdown the PGOOD output will actively pull down and may be used to discharge the output capacitors via
RT/SYNC (Pin 2):
Oscillator Frequency. This pin provides an external resistor. three ways of setting the constant switching frequency:
MODE (Pin 21):
Mode Selection. Tying the MODE pin 1. Connecting a resistor from RT/SYNC to ground will set to SV the switching frequency based on the resistor value. IN or SGND enables pulse-skipping mode or Burst Mode operation (with an internal Burst Mode clamp), 2. Driving the RT/SYNC pin with an external clock signal respectively. If this pin is held at slightly higher than half will synchronize the LTC3616 to the applied frequency. of SVIN, forced continuous mode is selected. Connecting The slope compensation is automatically adapted to the this pin to an external voltage selects Burst Mode opera- external clock frequency. tion with the burst clamp set to the pin voltage. See the 3. Tying the RT/SYNC pin to SV Operation section for more details. IN enables the internal 2.25MHz oscillator frequency.
VFB (Pin 22):
Voltage Feedback Input Pin. Senses the
SGND (Pin 3):
Signal Ground. All small-signal and com- feedback voltage from the external resistive divider across pensation components should connect to this ground, the output. which in turn should connect to PGND at a single point.
ITH (Pin 23):
Error Amplifier Compensation. The current
PV
comparator’s threshold increases with this control volt-
IN (Pins 4, 10, 11, 17):
Power Input Supply. PVIN connects to the source of the internal P-channel power age. Tying this pin to SVIN enables internal compensation MOSFET. This pin is independent of SV and AVP mode. IN and may be con- nected to the same voltage or to a lower voltage supply.
TRACK/SS (Pin 24):
Track/External Soft-Start/External
SW (Pins 5, 6, 7, 8, 13, 14, 15, 16):
Switch Node. Con- Reference. Start-up behavior is programmable with the nection to the inductor. These pins connect to the drains TRACK/SS pin: of the internal synchronous power MOSFET switches. 1. Tying this pin to SVIN selects the internal soft-start
NC (Pins 9, 12):
Can be connected to ground or left open. circuit.
SV
2. External soft-start timing can be programmed with a
IN (Pin 18):
Signal Input Supply. This pin powers the internal control circuitry and is monitored by the under- capacitor to ground and a resistor to SVIN. voltage lockout comparator. 3. TRACK/SS can be used to force the LTC3616 to track
RUN (Pin 19):
Enable Pin. Forcing this pin to ground shuts the start-up behavior of another supply. down the LTC3616. In shutdown, all functions are disabled The pin can also be used as external reference input. See and the chip draws <1µA of supply current. the Applications Information section for more information.
PGOOD (Pin 20):
Power Good. This open-drain output is
PGND (Exposed Pad Pin 25):
Power Ground. This pin pulled down to SGND on start-up and while the FB voltage connects to the source of the internal N-channel power is outside the power good voltage window. If the FB volt- MOSFET. This pin should be connected close to the (–) age increases and stays inside the power good window terminal of CIN and COUT. for more than 100µs the PGOOD pin is released. If the 3616fc For more information www.linear.com/LTC3616 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions SRLIM/DDR (Pin 1):
Slew Rate Limit. Tying this pin to FB voltage leaves the power good window for more than ground selects maximum slew rate. Minimum slew rate 100µs the PGOOD pin is pulled down. is selected when the pin is open. Connecting a resistor In DDR mode (DDR = V from SRLIM/DDR to ground allows the slew rate to be IN), the power good window moves in relation to the actual TRACK/SS pin voltage. During continuously adjusted. If SRLIM/DDR is tied to SVIN, DDR up/down tracking the PGOOD pin is always pulled down. mode is selected. In DDR mode the slew rate limit is set to maximum. In shutdown the PGOOD output will actively pull down and may be used to discharge the output capacitors via
RT/SYNC (Pin 2):
Oscillator Frequency. This pin provides an external resistor. three ways of setting the constant switching frequency:
MODE (Pin 21):
Mode Selection. Tying the MODE pin 1. Connecting a resistor from RT/SYNC to ground will set to SV the switching frequency based on the resistor value. IN or SGND enables pulse-skipping mode or Burst Mode operation (with an internal Burst Mode clamp), 2. Driving the RT/SYNC pin with an external clock signal respectively. If this pin is held at slightly higher than half will synchronize the LTC3616 to the applied frequency. of SVIN, forced continuous mode is selected. Connecting The slope compensation is automatically adapted to the this pin to an external voltage selects Burst Mode opera- external clock frequency. tion with the burst clamp set to the pin voltage. See the 3. Tying the RT/SYNC pin to SV Operation section for more details. IN enables the internal 2.25MHz oscillator frequency.
VFB (Pin 22):
Voltage Feedback Input Pin. Senses the
SGND (Pin 3):
Signal Ground. All small-signal and com- feedback voltage from the external resistive divider across pensation components should connect to this ground, the output. which in turn should connect to PGND at a single point.
ITH (Pin 23):
Error Amplifier Compensation. The current
PV
comparator’s threshold increases with this control volt-
IN (Pins 4, 10, 11, 17):
Power Input Supply. PVIN connects to the source of the internal P-channel power age. Tying this pin to SVIN enables internal compensation MOSFET. This pin is independent of SV and AVP mode. IN and may be con- nected to the same voltage or to a lower voltage supply.
TRACK/SS (Pin 24):
Track/External Soft-Start/External
SW (Pins 5, 6, 7, 8, 13, 14, 15, 16):
Switch Node. Con- Reference. Start-up behavior is programmable with the nection to the inductor. These pins connect to the drains TRACK/SS pin: of the internal synchronous power MOSFET switches. 1. Tying this pin to SVIN selects the internal soft-start
NC (Pins 9, 12):
Can be connected to ground or left open. circuit.
SV
2. External soft-start timing can be programmed with a
IN (Pin 18):
Signal Input Supply. This pin powers the internal control circuitry and is monitored by the under- capacitor to ground and a resistor to SVIN. voltage lockout comparator. 3. TRACK/SS can be used to force the LTC3616 to track
RUN (Pin 19):
Enable Pin. Forcing this pin to ground shuts the start-up behavior of another supply. down the LTC3616. In shutdown, all functions are disabled The pin can also be used as external reference input. See and the chip draws <1µA of supply current. the Applications Information section for more information.
PGOOD (Pin 20):
Power Good. This open-drain output is
PGND (Exposed Pad Pin 25):
Power Ground. This pin pulled down to SGND on start-up and while the FB voltage connects to the source of the internal N-channel power is outside the power good voltage window. If the FB volt- MOSFET. This pin should be connected close to the (–) age increases and stays inside the power good window terminal of CIN and COUT. for more than 100µs the PGOOD pin is released. If the 3616fc For more information www.linear.com/LTC3616 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
