Datasheet ADP5020 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Power Management Unit for Imaging Modules |
| Pages / Page | 28 / 10 — ADP5020. TYPICAL PERFORMANCE CHARACTERISTICS. 3.5. 3.3V. 3.0V. 3.0. 2.8V. … |
| Revision | A |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
ADP5020. TYPICAL PERFORMANCE CHARACTERISTICS. 3.5. 3.3V. 3.0V. 3.0. 2.8V. 2.5V. 2.5. Y (. LT O. IEN. 2.0V. 2.0. F 80. OUT1 (2.5V). 1.8V. OUT2 (2.8V)
Model Line for this Datasheet
Text Version of Document
ADP5020 TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 4.5 V, VOUT1 = 2.8 V, VOUT2 = VOUT3 = 1.8 V, IOUT = 100 mA, C4 = C1 = 10 μF, C2 = 4.7 μF, C3 = 1 μF, TJ = 25°C, unless otherwise noted.
3.5 95 3.3V 3.0V 3.0 90 2.8V ) ) (V 2.5V E % 2.5 85 G Y ( A C LT O IEN V 2.0V IC 2.0 V O F 80 OUT1 (2.5V) 1.8V V LD EF OUT2 (2.8V) VOUT3 (2.9V) VOUT4 (3.0V) 1.5 75 VOUT5 (3.2V) VOUT6 (3.3V) VOUT7 (3.7V) 1.0 70
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0 30 60 90 120 150
060
0 100 200 300 400 500 600
00 4- 4-
LOAD CURRENT (mA)
77
LOAD CURRENT (mA)
77 07 07 Figure 6. LDO Load Regulation Figure 9. Buck 1, Efficiency vs. Load Current
LDO OUTPUT = 20mV/DIV BUCK 1 OUTPUT = 100mV/DIV ILOAD = 100mA/DIV ILOAD = 100mA/DIV TIME = 100µs/DIV TIME = 100µs/DIV LDO BUCK 1 ILOAD ILOAD
7 0 00 01 4- 4- 77 77 07 07 Figure 7. LDO Load Transient Figure 10. Buck 1 Load Transient Response
3.8 1.9 VOUT8 (1.8V) 3.6 VOUT7 (3.7V) 1.8 VOUT7 (1.7V) 3.4 V V OUT5 (3.2V) 1.7 OUT6 (3.3V) ) ) VOUT6 (1.6V) (V 3.2 (V 1.6 E E G G A VOUT4 (3.0V) VOUT3 (2.9V) A VOUT5 (1.5V) 3.0 1.5 LT LT O O VOUT4 (1.4V) V 2.8 V T 1.4 T U VOUT2 (2.8V) U V TP OUT3 (1.3V) 2.6 TP 1.3 OU OU VOUT2 (1.2V) 2.4 VOUT1 (2.5V) 1.2 VOUT1 (1.1V) 2.2 1.1 0
8
0
1
0 100 200 300 400 500 600
00
0 50 100 150 200 250 300
01 4- 4-
LOAD CURRENT (mA)
77
LOAD CURRENT (mA)
77 07 07 Figure 8. Buck 1 Load Regulation Figure 11. Buck 2 Load Regulation Rev. 0 | Page 10 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS SWITCHING SPECIFICATIONS DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 1 REGULATOR DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 2 REGULATOR VOUT3 SPECIFICATIONS, LOW DROPOUT (LDO) REGULATOR I2C TIMING SPECIFICATIONS Timing Diagram ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Thermal Data ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT OPERATION INTERNAL COMPENSATION CURRENT LIMITING AND SHORT-CIRCUIT PROTECTION SYNCHRONIZATION I2C INTERFACE UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN CONTROL REGISTERS DEVICE ADDRESS REGISTER MAP REGISTER DESCRIPTIONS User Accessible Registers POWER-UP/POWER-DOWN SEQUENCE SEQUENCER DEFAULT POWER-ON SEQUENCE WITH EN PIN Activation Waveforms POWER-ON SEQUENCE USING THE I2C INTERFACE POWER-UP/POWER-DOWN STATE FLOW APPLICATIONS INFORMATION POWER GOOD STATUS XSHTDN LOGIC COMPONENTS SELECTION Buck Inductor Input Capacitor Selection Output Capacitor Selection LDO INPUT FILTER LAYOUT RECOMMENDATIONS APPLICATIONS SCHEMATIC PCB BOARD LAYOUT RECOMMENDATIONS EXTERNAL COMPONENT LIST OUTLINE DIMENSIONS ORDERING GUIDE
VIN = 4.5 V, VOUT1 = 2.8 V, VOUT2 = VOUT3 = 1.8 V, IOUT = 100 mA, C4 = C1 = 10 μF, C2 = 4.7 μF, C3 = 1 μF, TJ = 25°C, unless otherwise noted.
3.5 95 3.3V 3.0V 3.0 90 2.8V ) ) (V 2.5V E % 2.5 85 G Y ( A C LT O IEN V 2.0V IC 2.0 V O F 80 OUT1 (2.5V) 1.8V V LD EF OUT2 (2.8V) VOUT3 (2.9V) VOUT4 (3.0V) 1.5 75 VOUT5 (3.2V) VOUT6 (3.3V) VOUT7 (3.7V) 1.0 70
9
0 30 60 90 120 150
060
0 100 200 300 400 500 600
00 4- 4-
LOAD CURRENT (mA)
77
LOAD CURRENT (mA)
77 07 07 Figure 6. LDO Load Regulation Figure 9. Buck 1, Efficiency vs. Load Current
LDO OUTPUT = 20mV/DIV BUCK 1 OUTPUT = 100mV/DIV ILOAD = 100mA/DIV ILOAD = 100mA/DIV TIME = 100µs/DIV TIME = 100µs/DIV LDO BUCK 1 ILOAD ILOAD
7 0 00 01 4- 4- 77 77 07 07 Figure 7. LDO Load Transient Figure 10. Buck 1 Load Transient Response
3.8 1.9 VOUT8 (1.8V) 3.6 VOUT7 (3.7V) 1.8 VOUT7 (1.7V) 3.4 V V OUT5 (3.2V) 1.7 OUT6 (3.3V) ) ) VOUT6 (1.6V) (V 3.2 (V 1.6 E E G G A VOUT4 (3.0V) VOUT3 (2.9V) A VOUT5 (1.5V) 3.0 1.5 LT LT O O VOUT4 (1.4V) V 2.8 V T 1.4 T U VOUT2 (2.8V) U V TP OUT3 (1.3V) 2.6 TP 1.3 OU OU VOUT2 (1.2V) 2.4 VOUT1 (2.5V) 1.2 VOUT1 (1.1V) 2.2 1.1 0
8
0
1
0 100 200 300 400 500 600
00
0 50 100 150 200 250 300
01 4- 4-
LOAD CURRENT (mA)
77
LOAD CURRENT (mA)
77 07 07 Figure 8. Buck 1 Load Regulation Figure 11. Buck 2 Load Regulation Rev. 0 | Page 10 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS SWITCHING SPECIFICATIONS DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 1 REGULATOR DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 2 REGULATOR VOUT3 SPECIFICATIONS, LOW DROPOUT (LDO) REGULATOR I2C TIMING SPECIFICATIONS Timing Diagram ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Thermal Data ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT OPERATION INTERNAL COMPENSATION CURRENT LIMITING AND SHORT-CIRCUIT PROTECTION SYNCHRONIZATION I2C INTERFACE UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN CONTROL REGISTERS DEVICE ADDRESS REGISTER MAP REGISTER DESCRIPTIONS User Accessible Registers POWER-UP/POWER-DOWN SEQUENCE SEQUENCER DEFAULT POWER-ON SEQUENCE WITH EN PIN Activation Waveforms POWER-ON SEQUENCE USING THE I2C INTERFACE POWER-UP/POWER-DOWN STATE FLOW APPLICATIONS INFORMATION POWER GOOD STATUS XSHTDN LOGIC COMPONENTS SELECTION Buck Inductor Input Capacitor Selection Output Capacitor Selection LDO INPUT FILTER LAYOUT RECOMMENDATIONS APPLICATIONS SCHEMATIC PCB BOARD LAYOUT RECOMMENDATIONS EXTERNAL COMPONENT LIST OUTLINE DIMENSIONS ORDERING GUIDE
