Datasheet LTC3604 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 2.5A, 15V Monolithic Synchronous Step-Down Regulator |
| Pages / Page | 26 / 7 — PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15):. RT (Pin 10/Pin 8):. FB … |
| File Format / Size | PDF / 394 Kb |
| Document Language | English |
PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15):. RT (Pin 10/Pin 8):. FB (Pin 11/Pin 9):. PGOOD (Pin 2/Pin 16):
Model Line for this Datasheet
Text Version of Document
LTC3604
PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15):
Mode Selection and External
RT (Pin 10/Pin 8):
Oscillator Frequency Program Pin. Synchronization Input Pin. This pin places the LTC3604 Connect an external resistor, between 80k to 400k, from into forced continuous operation when tied to ground. this pin to SGND to program the LTC3604 switching fre- High efficiency Burst Mode operation is enabled by either quency from 800kHz to 4MHz. When RT is tied to INTVCC, floating this pin or by tying this pin to INTVCC. When driven the switching frequency will default to 2MHz. with an external clock, an internal phase-locked loop will
FB (Pin 11/Pin 9):
Output Voltage Feedback Pin. Input to synchronize the phase and frequency of the internal oscil- the error amplifier that compares the feedback voltage to lator to that of the incoming clock signal. During external the internal 0.6V reference voltage. Connect this pin to clock synchronization, the LTC3604 will default to forced the appropriate resistor divider network to program the continuous operation. desired output voltage.
PGOOD (Pin 2/Pin 16):
Open-Drain Power Good Output
ITH (Pin 12/Pin 10):
Error Amplifier Output and Switching Pin. PGOOD is pulled to ground when the voltage at the Regulator Compensation Pin. Connect this pin to appro- FB pin is not within ±8% (typical) of the internal 0.6V priate external components to compensate the regulator reference. PGOOD becomes high impedance once the loop frequency response. Connect this pin to INTV voltage at the FB pin returns to within ±5% (typical) of CC to use the default internal compensation. the internal reference.
TRACK/SS (Pin 13/Pin 11):
Output Voltage Tracking and
SW (Pins 3, 4/Pins 1, 2):
Switch Node Output Pin. Con- Soft-Start Input Pin. Forcing a voltage below 0.6V on nect this pin to the SW side of the external inductor. The this pin overrides the internal reference input to the error normal operation voltage swing of this pin ranges from amplifier. The LTC3604 will servo the FB pin to the TRACK ground to PVIN. voltage under this condition. Above 0.6V, the tracking
BOOST (Pin 6/Pin 5):
Boosted Floating Driver Supply function stops and the internal reference resumes control Pin. The (+) terminal of the external bootstrap capacitor of the error amplifier. An internal 1.4µA pull-up current connects to this pin while the (–) terminal connects to from INTVCC allows a soft-start function to be implemented the SW pin. The normal operation voltage swing of this by connecting an external capacitor between this pin and pin ranges from a diode voltage drop below INTVCC up ground. See Applications Information section for more to PVIN + INTVCC. details.
INTVCC (Pin 7/Pin 6):
Internal 3.3V Regulator Output Pin.
RUN (Pin 14/Pin 12):
Regulator Enable Pin. Enables chip This pin should be decoupled to PGND with a low ESR operation by applying a voltage above 1.25V. A voltage ceramic capacitor of 1µF or more. below 1V on this pin places the part into shutdown. Do
V
not float this pin.
ON (Pin 8/Pin 7):
On-Time Voltage Input Pin. This pin sets the voltage trip point for the on-time comparator. Con-
VIN (Pins 15, 16/Pins 13, 14):
Main Power Supply Input nect this pin to the regulated output to make the on-time Pins. These pins should be closely decoupled to PGND proportional to the output voltage. The pin impedance is with a low ESR capacitor of 10µF or more. normally 180kΩ.
PGND (Exposed Pad Pin 17/Pins 3, 4):
Power Ground
SGND (Pin 9/Exposed Pad Pin 17):
Signal Ground Pin. Pin. The (–) terminal of the input bypass capacitor, CIN, This pin should have a low noise connection to reference and the (–) terminal of the output capacitor, COUT , should ground. The feedback resistor network, external compensa- be tied to this pin with a low impedance connection. The tion network and RT resistor should be connected to this exposed package pad must be soldered to the PCB to ground. In the MSE package, this pin must be soldered provide low impedance electrical contact to ground and to the PCB to provide a good thermal contact to the PCB. good thermal contact to the PCB. 3604fa For more information www.linear.com/LTC3604 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts
PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15):
Mode Selection and External
RT (Pin 10/Pin 8):
Oscillator Frequency Program Pin. Synchronization Input Pin. This pin places the LTC3604 Connect an external resistor, between 80k to 400k, from into forced continuous operation when tied to ground. this pin to SGND to program the LTC3604 switching fre- High efficiency Burst Mode operation is enabled by either quency from 800kHz to 4MHz. When RT is tied to INTVCC, floating this pin or by tying this pin to INTVCC. When driven the switching frequency will default to 2MHz. with an external clock, an internal phase-locked loop will
FB (Pin 11/Pin 9):
Output Voltage Feedback Pin. Input to synchronize the phase and frequency of the internal oscil- the error amplifier that compares the feedback voltage to lator to that of the incoming clock signal. During external the internal 0.6V reference voltage. Connect this pin to clock synchronization, the LTC3604 will default to forced the appropriate resistor divider network to program the continuous operation. desired output voltage.
PGOOD (Pin 2/Pin 16):
Open-Drain Power Good Output
ITH (Pin 12/Pin 10):
Error Amplifier Output and Switching Pin. PGOOD is pulled to ground when the voltage at the Regulator Compensation Pin. Connect this pin to appro- FB pin is not within ±8% (typical) of the internal 0.6V priate external components to compensate the regulator reference. PGOOD becomes high impedance once the loop frequency response. Connect this pin to INTV voltage at the FB pin returns to within ±5% (typical) of CC to use the default internal compensation. the internal reference.
TRACK/SS (Pin 13/Pin 11):
Output Voltage Tracking and
SW (Pins 3, 4/Pins 1, 2):
Switch Node Output Pin. Con- Soft-Start Input Pin. Forcing a voltage below 0.6V on nect this pin to the SW side of the external inductor. The this pin overrides the internal reference input to the error normal operation voltage swing of this pin ranges from amplifier. The LTC3604 will servo the FB pin to the TRACK ground to PVIN. voltage under this condition. Above 0.6V, the tracking
BOOST (Pin 6/Pin 5):
Boosted Floating Driver Supply function stops and the internal reference resumes control Pin. The (+) terminal of the external bootstrap capacitor of the error amplifier. An internal 1.4µA pull-up current connects to this pin while the (–) terminal connects to from INTVCC allows a soft-start function to be implemented the SW pin. The normal operation voltage swing of this by connecting an external capacitor between this pin and pin ranges from a diode voltage drop below INTVCC up ground. See Applications Information section for more to PVIN + INTVCC. details.
INTVCC (Pin 7/Pin 6):
Internal 3.3V Regulator Output Pin.
RUN (Pin 14/Pin 12):
Regulator Enable Pin. Enables chip This pin should be decoupled to PGND with a low ESR operation by applying a voltage above 1.25V. A voltage ceramic capacitor of 1µF or more. below 1V on this pin places the part into shutdown. Do
V
not float this pin.
ON (Pin 8/Pin 7):
On-Time Voltage Input Pin. This pin sets the voltage trip point for the on-time comparator. Con-
VIN (Pins 15, 16/Pins 13, 14):
Main Power Supply Input nect this pin to the regulated output to make the on-time Pins. These pins should be closely decoupled to PGND proportional to the output voltage. The pin impedance is with a low ESR capacitor of 10µF or more. normally 180kΩ.
PGND (Exposed Pad Pin 17/Pins 3, 4):
Power Ground
SGND (Pin 9/Exposed Pad Pin 17):
Signal Ground Pin. Pin. The (–) terminal of the input bypass capacitor, CIN, This pin should have a low noise connection to reference and the (–) terminal of the output capacitor, COUT , should ground. The feedback resistor network, external compensa- be tied to this pin with a low impedance connection. The tion network and RT resistor should be connected to this exposed package pad must be soldered to the PCB to ground. In the MSE package, this pin must be soldered provide low impedance electrical contact to ground and to the PCB to provide a good thermal contact to the PCB. good thermal contact to the PCB. 3604fa For more information www.linear.com/LTC3604 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts
