Datasheet LTC3547B (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | Dual Monolithic 300mA Synchronous Step-Down Regulator |
| Pages / Page | 16 / 6 — PI FU CTIO S. VFB1 (Pin 1):. SW2 (Pin 6):. RUN2 (Pin 7):. RUN1 (Pin 2):. … |
| File Format / Size | PDF / 260 Kb |
| Document Language | English |
PI FU CTIO S. VFB1 (Pin 1):. SW2 (Pin 6):. RUN2 (Pin 7):. RUN1 (Pin 2):. FB2 (Pin 8):. VIN (Pin 3):. SW1 (Pin 4):. Exposed Pad (Pin 9):
Model Line for this Datasheet
Text Version of Document
LTC3547B
U U U PI FU CTIO S VFB1 (Pin 1):
Regulator 1 Output Feedback. Receives
SW2 (Pin 6):
Regulator 2 Switch Node Connection to the feedback voltage from the external resistor divider the Inductor. This pin swings from VIN to GND. across the regulator 1 output. Nominal voltage for this
RUN2 (Pin 7):
Regulator 2 Enable. Forcing this pin to pin is 0.6V. VIN enables regulator 2, while forcing it to GND causes
RUN1 (Pin 2):
Regulator 1 Enable. Forcing this pin to regulator 2 to shut down. VIN enables regulator 1, while forcing it to GND causes
V
regulator 1 to shut down.
FB2 (Pin 8):
Regulator 2 Output Feedback. Receives the feedback voltage from the external resistor divider
VIN (Pin 3):
Main Power Supply. Must be closely decou- across the regulator 2 output. Nominal voltage for this pled to GND. pin is 0.6V.
SW1 (Pin 4):
Regulator 1 Switch Node Connection to the
Exposed Pad (Pin 9):
Electrically Connected to GND. Inductor. This pin swings from VIN to GND. Must be soldered to the PCB for optimum thermal
GND (Pin 5):
Ground. Connect to the (–) terminal of C performance. OUT, and the (–) terminal of CIN.
FUNCTIONAL DIAGRAM
REGULATOR 1 3 V SLOPE IN COMP VFB1 1 – – I SLEEP – + TH 5Ω EA ICOMP + VSLEEP + 0.6V PULSE SKIP S Q RS LATCH SOFT-START R Q SWITCHING LOGIC AND BLANKING ANTI CIRCUIT SHOOT- THRU 4 SW1 + IRCMP – SHUTDOWN 5 GND 3547 FD RUN1 2 0.6V REF OSC RUN2 7 OSC REGULATOR 2 (IDENTICAL TO REGULATOR 1) V 8 6 SW2 FB2 3547bfb 6
U U U PI FU CTIO S VFB1 (Pin 1):
Regulator 1 Output Feedback. Receives
SW2 (Pin 6):
Regulator 2 Switch Node Connection to the feedback voltage from the external resistor divider the Inductor. This pin swings from VIN to GND. across the regulator 1 output. Nominal voltage for this
RUN2 (Pin 7):
Regulator 2 Enable. Forcing this pin to pin is 0.6V. VIN enables regulator 2, while forcing it to GND causes
RUN1 (Pin 2):
Regulator 1 Enable. Forcing this pin to regulator 2 to shut down. VIN enables regulator 1, while forcing it to GND causes
V
regulator 1 to shut down.
FB2 (Pin 8):
Regulator 2 Output Feedback. Receives the feedback voltage from the external resistor divider
VIN (Pin 3):
Main Power Supply. Must be closely decou- across the regulator 2 output. Nominal voltage for this pled to GND. pin is 0.6V.
SW1 (Pin 4):
Regulator 1 Switch Node Connection to the
Exposed Pad (Pin 9):
Electrically Connected to GND. Inductor. This pin swings from VIN to GND. Must be soldered to the PCB for optimum thermal
GND (Pin 5):
Ground. Connect to the (–) terminal of C performance. OUT, and the (–) terminal of CIN.
FUNCTIONAL DIAGRAM
REGULATOR 1 3 V SLOPE IN COMP VFB1 1 – – I SLEEP – + TH 5Ω EA ICOMP + VSLEEP + 0.6V PULSE SKIP S Q RS LATCH SOFT-START R Q SWITCHING LOGIC AND BLANKING ANTI CIRCUIT SHOOT- THRU 4 SW1 + IRCMP – SHUTDOWN 5 GND 3547 FD RUN1 2 0.6V REF OSC RUN2 7 OSC REGULATOR 2 (IDENTICAL TO REGULATOR 1) V 8 6 SW2 FB2 3547bfb 6
