Datasheet LTC3407-4 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Dual Synchronous, 800mA, 2.25MHz Step-Down DC/DC Regulator |
| Pages / Page | 16 / 3 — ELECTRICAL CHARACTERISTICS The. denotes the specifi cations which apply … |
| File Format / Size | PDF / 275 Kb |
| Document Language | English |
ELECTRICAL CHARACTERISTICS The. denotes the specifi cations which apply over the full operating
Model Line for this Datasheet
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LTC3407-4
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VIN = 3.6V, unless otherwise specifi ed. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fOSC Oscillator Frequency VFBX = 0.6V ● 1.8 2.25 2.7 MHz fSYNC Synchronization Frequency 2.25 MHz ILIM Peak Switch Current Limit VIN = 3V, VFBX = 0.5V, Duty Cycle <35% 0.95 1.2 1.6 A RDS(ON) Top Switch On-Resistance (Note 6) 0.35 0.45 Ω Bottom Switch On-Resistance (Note 6) 0.30 0.45 Ω ISW(LKG) Switch Leakage Current VIN = 5V, VRUN = 0V, VFBX = 0V 0.01 1 μA POR Power-On Reset Threshold VFBX Ramping Up, MODE/SYNC = 0V 8.5 % VFBX Ramping Down, MODE/SYNC = 0V –8.5 % Power-On Reset On-Resistance 100 200 Ω Power-On Reset Delay 65536 Cycles VRUN RUN Threshold ● 0.3 1 1.5 V IRUN RUN Leakage Current ● 0.01 1 μA VMODE MODE Threshold Low 0 0.5 V MODE Threshold High VIN – 0.5 VIN V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 3:
The LTC3407-4 is tested in a proprietary test mode that connects may cause permanent damage to the device. Exposure to any Absolute VFB to the output of the error amplifi er. Maximum Rating condition for extended periods may affect device
Note 4:
Dynamic supply current is higher due to the internal gate charge reliability and lifetime. Pins of regulators should not exceed 6V being delivered at the switching frequency.
Note 2:
The LTC3407E-4 is guaranteed to meet specifi ed performance
Note 5:
TJ is calculated from the ambient TA and power dissipation PD from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating according to the following formula: TJ = TA + (PD • θJA). temperature range are assured by design, characterization and correlation
Note 6:
The DFN switch on-resistance is guaranteed by correlation to with statistical process controls. wafer level measurements.
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise specifi ed. Burst Mode Operation Pulse-Skipping Mode Load Step
SW SW 5V/DIV 5V/DIV VOUT 200mV/DIV VOUT V I OUT L 20mV/DIV 20mV/DIV 500mA/DIV ILOAD IL IL 500mA/DIV 200mA/DIV 200mA/DIV VIN = 3.6V 2μs/DIV 34073 G01 VIN = 3.6V 1μs/DIV 34073 G02 VIN = 3.6V 10μs/DIV 34074 G03 VOUT = 1.8V VOUT = 1.8V VOUT = 1.8V ILOAD = 100mA ILOAD = 20mA ILOAD = 80mA ~ 800mA 34074fa 3
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VIN = 3.6V, unless otherwise specifi ed. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fOSC Oscillator Frequency VFBX = 0.6V ● 1.8 2.25 2.7 MHz fSYNC Synchronization Frequency 2.25 MHz ILIM Peak Switch Current Limit VIN = 3V, VFBX = 0.5V, Duty Cycle <35% 0.95 1.2 1.6 A RDS(ON) Top Switch On-Resistance (Note 6) 0.35 0.45 Ω Bottom Switch On-Resistance (Note 6) 0.30 0.45 Ω ISW(LKG) Switch Leakage Current VIN = 5V, VRUN = 0V, VFBX = 0V 0.01 1 μA POR Power-On Reset Threshold VFBX Ramping Up, MODE/SYNC = 0V 8.5 % VFBX Ramping Down, MODE/SYNC = 0V –8.5 % Power-On Reset On-Resistance 100 200 Ω Power-On Reset Delay 65536 Cycles VRUN RUN Threshold ● 0.3 1 1.5 V IRUN RUN Leakage Current ● 0.01 1 μA VMODE MODE Threshold Low 0 0.5 V MODE Threshold High VIN – 0.5 VIN V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 3:
The LTC3407-4 is tested in a proprietary test mode that connects may cause permanent damage to the device. Exposure to any Absolute VFB to the output of the error amplifi er. Maximum Rating condition for extended periods may affect device
Note 4:
Dynamic supply current is higher due to the internal gate charge reliability and lifetime. Pins of regulators should not exceed 6V being delivered at the switching frequency.
Note 2:
The LTC3407E-4 is guaranteed to meet specifi ed performance
Note 5:
TJ is calculated from the ambient TA and power dissipation PD from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating according to the following formula: TJ = TA + (PD • θJA). temperature range are assured by design, characterization and correlation
Note 6:
The DFN switch on-resistance is guaranteed by correlation to with statistical process controls. wafer level measurements.
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise specifi ed. Burst Mode Operation Pulse-Skipping Mode Load Step
SW SW 5V/DIV 5V/DIV VOUT 200mV/DIV VOUT V I OUT L 20mV/DIV 20mV/DIV 500mA/DIV ILOAD IL IL 500mA/DIV 200mA/DIV 200mA/DIV VIN = 3.6V 2μs/DIV 34073 G01 VIN = 3.6V 1μs/DIV 34073 G02 VIN = 3.6V 10μs/DIV 34074 G03 VOUT = 1.8V VOUT = 1.8V VOUT = 1.8V ILOAD = 100mA ILOAD = 20mA ILOAD = 80mA ~ 800mA 34074fa 3
