Datasheet LTC3416 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 4A, 4MHz, Monolithic Synchronous Step-Down Regulator with Tracking |
| Pages / Page | 16 / 6 — FU CTIO AL DIAGRA. OPERATIO. Main Control Loop |
| File Format / Size | PDF / 219 Kb |
| Document Language | English |
FU CTIO AL DIAGRA. OPERATIO. Main Control Loop
Model Line for this Datasheet
Text Version of Document
LTC3416
U U W FU CTIO AL DIAGRA
EXPOSED SVIN SGND PAD ITH PVIN 16 5 21 18 7 14 PMOS CURRENT SLOPE COMPARATOR VOLTAGE COMPENSATION REFERENCE RECOVERY TRACK + 3 – + – ERROR SLOPE V AMPLIFIER FB COMPENSATION 19 0.74V + OSCILLATOR 8 – 9 SW LOGIC 12 – + 13 + 0.86V – RUN/SS NMOS CURRENT 4 RUN COMPARATOR 1 PGOOD 10 17 PGND 11 2 20 3416 FD RT
U OPERATIO Main Control Loop
the ITH voltage until the average inductor current matches the new load current. When the top power MOSFET shuts The LTC3416 is a monolithic, constant frequency, current off, the synchronous power switch (N-channel MOSFET) mode step-down DC/DC converter. During normal opera- turns on until either the bottom current limit is reached or tion, the internal top power switch (P-channel MOSFET) is the beginning of the next clock cycle. The bottom current turned on at the beginning of each clock cycle. Current in limit is set at –5A. the inductor increases until the current comparator trips and turns off the top power MOSFET. The peak inductor The operating frequency is externally set by an external current at which the current comparator shuts off the top resistor connected between the RT pin and ground. The power switch is controlled by the voltage on the ITH pin. practical switching frequency can range from 300kHz to The error amplifier adjusts the voltage on the ITH pin by 4MHz. comparing the feedback signal from a resistor divider on Overvoltage and undervoltage comparators will pull the the VFB pin with an internal 0.8V reference. When the load PGOOD output low if the output voltage comes out of current increases, it causes a reduction in the feedback regulation by ±7.5%. In an overvoltage condition, the top voltage relative to the reference. The error amplifier raises 3416fa 6
U U W FU CTIO AL DIAGRA
EXPOSED SVIN SGND PAD ITH PVIN 16 5 21 18 7 14 PMOS CURRENT SLOPE COMPARATOR VOLTAGE COMPENSATION REFERENCE RECOVERY TRACK + 3 – + – ERROR SLOPE V AMPLIFIER FB COMPENSATION 19 0.74V + OSCILLATOR 8 – 9 SW LOGIC 12 – + 13 + 0.86V – RUN/SS NMOS CURRENT 4 RUN COMPARATOR 1 PGOOD 10 17 PGND 11 2 20 3416 FD RT
U OPERATIO Main Control Loop
the ITH voltage until the average inductor current matches the new load current. When the top power MOSFET shuts The LTC3416 is a monolithic, constant frequency, current off, the synchronous power switch (N-channel MOSFET) mode step-down DC/DC converter. During normal opera- turns on until either the bottom current limit is reached or tion, the internal top power switch (P-channel MOSFET) is the beginning of the next clock cycle. The bottom current turned on at the beginning of each clock cycle. Current in limit is set at –5A. the inductor increases until the current comparator trips and turns off the top power MOSFET. The peak inductor The operating frequency is externally set by an external current at which the current comparator shuts off the top resistor connected between the RT pin and ground. The power switch is controlled by the voltage on the ITH pin. practical switching frequency can range from 300kHz to The error amplifier adjusts the voltage on the ITH pin by 4MHz. comparing the feedback signal from a resistor divider on Overvoltage and undervoltage comparators will pull the the VFB pin with an internal 0.8V reference. When the load PGOOD output low if the output voltage comes out of current increases, it causes a reduction in the feedback regulation by ±7.5%. In an overvoltage condition, the top voltage relative to the reference. The error amplifier raises 3416fa 6
