Datasheet ADSP-21362, ADSP-21363, ADSP-21364, ADSP-21365, ADSP-21366 (Analog Devices) - 9

ADSP-21362/ADSP-21363/ADSP-2 1364/ADSP-21365/ADSP-21366
features. Also available are various EZ-Extenders®, which are
ADSP-213xx 100nF 10nF 1nF
daughter cards delivering additional specialized functionality,
V AVDD DDINT
including audio and video processing. For more information visit www.analog.com and search on “ezkit” or “ezextender”.
HIGH-Z FERRITE BEAD CHIP AVSS EZ-KIT Lite Evaluation Kits
For a cost-effective way to learn more about developing with
LOCATE ALL COMPONENTS
Analog Devices processors, Analog Devices offer a range of EZ-
CLOSE TO AVDD AND AVSS PINS
KIT Lite evaluation kits. Each evaluation kit includes an EZ-KIT Lite evaluation board, directions for downloading an evaluation Figure 3. Analog Power (AVDD) Filter Circuit version of the available IDE(s), a USB cable, and a power supply.
Target Board JTAG Emulator Connector
The USB controller on the EZ-KIT Lite board connects to the USB port of the user’s PC, enabling the chosen IDE evaluation Analog Devices’ DSP Tools product line of JTAG emulators suite to emulate the on-board processor in-circuit. This permits uses the IEEE 1149.1 JTAG test access port of the processor to the customer to download, execute, and debug programs for the monitor and control the target board processor during emula- EZ-KIT Lite system. It also supports in-circuit programming of tion. Analog Devices’ DSP Tools product line of JTAG the on-board Flash device to store user-specific boot code, emulators provides emulation at full processor speed, allowing enabling standalone operation. With the full version of Cross- inspection and modification of memory, registers, and proces- Core Embedded Studio or VisualDSP++ installed (sold sor stacks. The processor’s JTAG interface ensures that the separately), engineers can develop software for supported EZ- emulator does not affect target system loading or timing. KITs or any custom system utilizing supported Analog Devices For complete information on Analog Devices’ SHARC DSP processors. Tools product line of JTAG emulator operation, refer to the
Software Add-Ins for CrossCore Embedded Studio
appropriate emulator user’s guide. Analog Devices offers software add-ins which seamlessly inte-
DEVELOPMENT TOOLS
grate with CrossCore Embedded Studio to extend its capabilities Analog Devices supports its processors with a complete line of and reduce development time. Add-ins include board support software and hardware development tools, including integrated packages for evaluation hardware, various middleware pack- development environments (which include CrossCore® Embed- ages, and algorithmic modules. Documentation, help, ded Studio and/or VisualDSP++®), evaluation products, configuration dialogs, and coding examples present in these emulators, and a wide variety of software add-ins. add-ins are viewable through the CrossCore Embedded Studio IDE once the add-in is installed.
Integrated Development Environments (IDEs) Board Support Packages for Evaluation Hardware
For C/C++ software writing and editing, code generation, and debug support, Analog Devices offers two IDEs. Software support for the EZ-KIT Lite evaluation boards and EZ- Extender daughter cards is provided by software add-ins called The newest IDE, CrossCore Embedded Studio, is based on the Board Support Packages (BSPs). The BSPs contain the required EclipseTM framework. Supporting most Analog Devices proces- drivers, pertinent release notes, and select example code for the sor families, it is the IDE of choice for future processors, given evaluation hardware. A download link for a specific BSP is including multicore devices. CrossCore Embedded Studio located on the web page for the associated EZ-KIT or EZ- seamlessly integrates available software add-ins to support real Extender product. The link is found in the Product Download time operating systems, file systems, TCP/IP stacks, USB stacks, area of the product web page. algorithmic software modules, and evaluation hardware board support packages. For more information visit
Middleware Packages
www.analog.com/cces. Analog Devices separately offers middleware add-ins such as The other Analog Devices IDE, VisualDSP++, supports proces- real time operating systems, file systems, USB stacks, and sor families introduced prior to the release of CrossCore TCP/IP stacks. For more information see the following web Embedded Studio. This IDE includes the Analog Devices VDK pages: real time operating system and an open source TCP/IP stack. • www.analog.com/ucos3 For more information visit www.analog.com/visualdsp. Note that VisualDSP++ will not support future Analog Devices • www.analog.com/ucfs processors. • www.analog.com/ucusbd
EZ-KIT Lite Evaluation Board
• www.analog.com/lwip For processor evaluation, Analog Devices provides wide range
Algorithmic Modules
of EZ-KIT Lite® evaluation boards. Including the processor and key peripherals, the evaluation board also supports on-chip To speed development, Analog Devices offers add-ins that per- emulation capabilities and other evaluation and development form popular audio and video processing algorithms. These are available for use with both CrossCore Embedded Studio and Rev. J | Page 9 of 60 | July 2013 Document Outline Summary Dedicated Audio Components Table of Contents Revision History General Description SHARC Family Core Architecture SIMD Computational Engine Independent, Parallel Computation Units Data Register File Context Switch Universal Registers Timer Single-Cycle Fetch of Instruction and Four Operands Instruction Cache Data Address Generators with Zero-Overhead Hardware Circular Buffer Support Flexible Instruction Set On-Chip Memory On-Chip Memory Bandwidth ROM-Based Security Family Peripheral Architecture Parallel Port Serial Peripheral (Compatible) Interface Pulse-Width Modulation Digital Audio Interface (DAI) Serial Ports S/PDIF-Compatible Digital Audio Receiver/Transmitter Digital Transmission Content Protection (DTCP) Memory-to-Memory (MTM) Synchronous/Asynchronous Sample Rate Converter (SRC) Input Data Port (IDP) Precision Clock Generator (PCG) Peripheral Timers I/O Processor Features DMA Controller System Design Program Booting Phase-Locked Loop Power Supplies Target Board JTAG Emulator Connector Development Tools Integrated Development Environments (IDEs) EZ-KIT Lite Evaluation Board EZ-KIT Lite Evaluation Kits Software Add-Ins for CrossCore Embedded Studio Board Support Packages for Evaluation Hardware Middleware Packages Algorithmic Modules Designing an Emulator-Compatible DSP Board (Target) Additional Information Related Signal Chains Pin Function Descriptions Specifications Operating Conditions Electrical Characteristics Package Information ESD Caution Maximum Power Dissipation Absolute Maximum Ratings Timing Specifications Core Clock Requirements Voltage Controlled Oscillator Power-Up Sequencing Clock Input Clock Signals Reset Interrupts Core Timer Timer PWM_OUT Cycle Timing Timer WDTH_CAP Timing DAI Pin to Pin Direct Routing Precision Clock Generator (Direct Pin Routing) Flags Memory Read—Parallel Port Memory Write—Parallel Port Serial Ports Input Data Port (IDP) Parallel Data Acquisition Port (PDAP) Pulse-Width Modulation Generators Sample Rate Converter—Serial Input Port Sample Rate Converter—Serial Output Port S/PDIF Transmitter S/PDIF Transmitter-Serial Input Waveforms S/PDIF Transmitter Input Data Timing Oversampling Clock (TxCLK) Switching Characteristics S/PDIF Receiver Internal Digital PLL Mode SPI Interface—Master SPI Interface—Slave JTAG Test Access Port and Emulation Output Drive Currents Test Conditions Capacitive Loading Thermal Characteristics 144-Lead LQFP_EP Pin Configurations 136-Ball BGA Pin Configurations Package Dimensions Surface-Mount Design Automotive Products Ordering Guide