Datasheet ADL5335 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 700 MHz to 4200 MHz Tx DGA |
| Pages / Page | 16 / 10 — ADL5335. Data Sheet. 0.5. 0.4. 0.3. 0.2. R (. 0.1. RRO. –0.1. S IN. –0.2. … |
| File Format / Size | PDF / 525 Kb |
| Document Language | English |
ADL5335. Data Sheet. 0.5. 0.4. 0.3. 0.2. R (. 0.1. RRO. –0.1. S IN. –0.2. –0.3. +85°C. –0.4. +25°C. 4.75V. –40°C. 5.25V. –0.5
Model Line for this Datasheet
Text Version of Document
ADL5335 Data Sheet 0.5 16 0.4 15 14 0.3 13 B) 0.2 d 12 R ( 0.1 ) 11 B RRO d E 0 ( 10 P IN E A T –0.1 G 9 S IN 8 A –0.2 G 7 –0.3 6 +85°C 5V –0.4 +85°C +25°C 5 +25°C 4.75V –40°C –40°C 5.25V –0.5
0
4
3
–8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 7 8 9 10 11 12
1 -0
0.5 5
01 4-
GAIN SETTING (dB)
304
FREQUENCY (GHz)
30 16 16 Figure 10. Gain Step Error vs. Gain Setting for Various Temperatures, VPOS = 5 V Figure 13. Gain vs. Frequency for Various Temperatures and VPOS
20 14 15 10 12 5 0 10 –5 ) ) B –10 8 d ( (dB –15 IN 21 A –20 G SD 6 S –25 –30 4 –35 –40 2 –45 –50
1
0
4
0.5 5
1 -0
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
01 4-
FREQUENCY LOGARITHMIC RESPONSE (GHz)
304
FREQUENCY (GHz)
30 16 16 Figure 11. Gain vs. Frequency Logarithmic Response with a Maximum Gain = Figure 14. Forward Transmission (SSD21) vs. Frequency, Gain = 12 dB +12 dB to a Minimum Gain = −8 dB in 1 dB Steps
15 –24 –26 10 –28 5 –30 ) ) B d ( (dB 0 IN –32 12 A G DSS –34 –5 –36 –10 –38 –15
2
–40
5
0.6 1.8 2.4 3.0 3.6 4.2
1 -0 01
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
4-
FREQUENCY (GHz)
304
FREQUENCY (GHz)
30 16 16 Figure 12. Gain vs. Frequency for All Gain Steps (+12 dB to −8 dB, Figure 15. Reverse Transmission (SDS12) vs. Frequency, Gain = 12 dB 0.5 dB Step Size), VPOS = 5 V, Temperature = 25°C Rev. 0 | Page 10 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DIGITAL LOGIC TIMING SPI Timing Diagram ABSOLUTE MAXIMUM RATINGS THREMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC STRUCTURE DIGITAL INTERFACE OVERVIEW Serial Peripheral Interface (SPI) Fast Attack (FA) APPLICATIONS INFORMATION BASIC CONNECTIONS OUTLINE DIMENSIONS ORDERING GUIDE
0
4
3
–8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 7 8 9 10 11 12
1 -0
0.5 5
01 4-
GAIN SETTING (dB)
304
FREQUENCY (GHz)
30 16 16 Figure 10. Gain Step Error vs. Gain Setting for Various Temperatures, VPOS = 5 V Figure 13. Gain vs. Frequency for Various Temperatures and VPOS
20 14 15 10 12 5 0 10 –5 ) ) B –10 8 d ( (dB –15 IN 21 A –20 G SD 6 S –25 –30 4 –35 –40 2 –45 –50
1
0
4
0.5 5
1 -0
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
01 4-
FREQUENCY LOGARITHMIC RESPONSE (GHz)
304
FREQUENCY (GHz)
30 16 16 Figure 11. Gain vs. Frequency Logarithmic Response with a Maximum Gain = Figure 14. Forward Transmission (SSD21) vs. Frequency, Gain = 12 dB +12 dB to a Minimum Gain = −8 dB in 1 dB Steps
15 –24 –26 10 –28 5 –30 ) ) B d ( (dB 0 IN –32 12 A G DSS –34 –5 –36 –10 –38 –15
2
–40
5
0.6 1.8 2.4 3.0 3.6 4.2
1 -0 01
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
4-
FREQUENCY (GHz)
304
FREQUENCY (GHz)
30 16 16 Figure 12. Gain vs. Frequency for All Gain Steps (+12 dB to −8 dB, Figure 15. Reverse Transmission (SDS12) vs. Frequency, Gain = 12 dB 0.5 dB Step Size), VPOS = 5 V, Temperature = 25°C Rev. 0 | Page 10 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DIGITAL LOGIC TIMING SPI Timing Diagram ABSOLUTE MAXIMUM RATINGS THREMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC STRUCTURE DIGITAL INTERFACE OVERVIEW Serial Peripheral Interface (SPI) Fast Attack (FA) APPLICATIONS INFORMATION BASIC CONNECTIONS OUTLINE DIMENSIONS ORDERING GUIDE
