Datasheet ADL5201 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Wide Dynamic Range, High Speed, Digitally Controlled VGA |
| Pages / Page | 26 / 7 — Data Sheet. ADL5201. TYPICAL PERFORMANCE CHARACTERISTICS. 46MHz. 20dB. … |
| Revision | C |
| File Format / Size | PDF / 909 Kb |
| Document Language | English |
Data Sheet. ADL5201. TYPICAL PERFORMANCE CHARACTERISTICS. 46MHz. 20dB. 18dB. 16dB. 14dB. 12dB. 10dB. 8dB. 6dB. 140MHz. 19dB. 17dB. 15dB. 13dB. 11dB. 9dB. 7dB
Model Line for this Datasheet
Text Version of Document
Data Sheet ADL5201 TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, TA = 25°C, RS = RL = 150 Ω at 200 MHz, high performance mode, 2 V p-p differential output, unless otherwise noted.
25 25 46MHz 20dB 18dB 16dB 14dB 12dB 10dB 8dB 6dB 140MHz 19dB 17dB 15dB 13dB 11dB 9dB 7dB 5dB 20 300MHz 20 15 15 10 10 ) ) B d B 5 ( d 5 ( IN IN GA 0 GA 0 –5 –5 –10 –10 –15 4dB 2dB 0dB –2dB –4dB –6dB –8dB –10dB –15 3dB 1dB –1dB –3dB –5dB –7dB –9dB –11dB –20 0 10 20 30 40 50 60 70
005
10 100 1000
08-0
GAIN CODE
388- 388 09
FREQUENCY (MHz)
09 Figure 6. Gain vs. Gain Code at 46 MHz, 140 MHz, and 300 MHz Figure 9. Gain vs. Frequency Response (Every 1 dB Step)
45 45 TA = –40°C TA = +25°C TA = +85°C 40 40 35 35 MIN GAIN (–11.5dB) ) B) 30 B 30 d d ( ( 25 RE 25 URE U IG IG F 20 F 20 MID GAIN (+5dB) E E IS IS 15 NO 15 NO 10 10 MAX GAIN (+20dB) 5 5 0 0 –15 –10 –5 0 5 10 15 20 25 0 100 200 300 400 500 600
006 009
PROGRAMMED GAIN (dB) FREQUENCY (MHz)
09388- 09388- Figure 7. Noise Figure vs. Programmed Gain at 140 MHz Figure 10. Noise Figure vs. Frequency at Max, Mid, and Min Gain Outputs
25 20 18 20 16 14 ) 15 m 12 TA = –40°C Bm) B d d TA = +25°C ( T B ( 10 B A = +85°C 1d d P 10 O 8 OP1 6 INPUT 5 MAX RATINGS 4 BOUNDARY 2 0 0 –15 –10 –5 0 5 10 15 20 25
07
0 50 100 150 200 250 300 350 400
10 -0 -0
PROGRAMMED GAIN (dB)
388 388 09
FREQUENCY (MHz)
09 Figure 8. OP1dB vs. Programmed Gain at 140 MHz Figure 11. OP1dB vs. Frequency at Maximum Gain, Three Temperatures Rev. C | Page 7 of 26 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CHARACTERIZATION AND TEST CIRCUITS THEORY OF OPERATION DIGITAL INTERFACE OVERVIEW PARALLEL DIGITAL INTERFACE SERIAL PERIPHERAL INTERFACE (SPI) Fast Attack UP/DOWN INTERFACE Truth Table LOGIC TIMING CIRCUIT DESCRIPTION BASIC STRUCTURE INPUT SYSTEM OUTPUT AMPLIFIER GAIN CONTROL APPLICATIONS INFORMATION BASIC CONNECTIONS ADC DRIVING LAYOUT CONSIDERATIONS EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK EVALUATION BOARD CONFIGURATION OPTIONS Configuration Options for the Main Section Configuration Options for the USB Section OUTLINE DIMENSIONS ORDERING GUIDE
VS = 5 V, TA = 25°C, RS = RL = 150 Ω at 200 MHz, high performance mode, 2 V p-p differential output, unless otherwise noted.
25 25 46MHz 20dB 18dB 16dB 14dB 12dB 10dB 8dB 6dB 140MHz 19dB 17dB 15dB 13dB 11dB 9dB 7dB 5dB 20 300MHz 20 15 15 10 10 ) ) B d B 5 ( d 5 ( IN IN GA 0 GA 0 –5 –5 –10 –10 –15 4dB 2dB 0dB –2dB –4dB –6dB –8dB –10dB –15 3dB 1dB –1dB –3dB –5dB –7dB –9dB –11dB –20 0 10 20 30 40 50 60 70
005
10 100 1000
08-0
GAIN CODE
388- 388 09
FREQUENCY (MHz)
09 Figure 6. Gain vs. Gain Code at 46 MHz, 140 MHz, and 300 MHz Figure 9. Gain vs. Frequency Response (Every 1 dB Step)
45 45 TA = –40°C TA = +25°C TA = +85°C 40 40 35 35 MIN GAIN (–11.5dB) ) B) 30 B 30 d d ( ( 25 RE 25 URE U IG IG F 20 F 20 MID GAIN (+5dB) E E IS IS 15 NO 15 NO 10 10 MAX GAIN (+20dB) 5 5 0 0 –15 –10 –5 0 5 10 15 20 25 0 100 200 300 400 500 600
006 009
PROGRAMMED GAIN (dB) FREQUENCY (MHz)
09388- 09388- Figure 7. Noise Figure vs. Programmed Gain at 140 MHz Figure 10. Noise Figure vs. Frequency at Max, Mid, and Min Gain Outputs
25 20 18 20 16 14 ) 15 m 12 TA = –40°C Bm) B d d TA = +25°C ( T B ( 10 B A = +85°C 1d d P 10 O 8 OP1 6 INPUT 5 MAX RATINGS 4 BOUNDARY 2 0 0 –15 –10 –5 0 5 10 15 20 25
07
0 50 100 150 200 250 300 350 400
10 -0 -0
PROGRAMMED GAIN (dB)
388 388 09
FREQUENCY (MHz)
09 Figure 8. OP1dB vs. Programmed Gain at 140 MHz Figure 11. OP1dB vs. Frequency at Maximum Gain, Three Temperatures Rev. C | Page 7 of 26 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CHARACTERIZATION AND TEST CIRCUITS THEORY OF OPERATION DIGITAL INTERFACE OVERVIEW PARALLEL DIGITAL INTERFACE SERIAL PERIPHERAL INTERFACE (SPI) Fast Attack UP/DOWN INTERFACE Truth Table LOGIC TIMING CIRCUIT DESCRIPTION BASIC STRUCTURE INPUT SYSTEM OUTPUT AMPLIFIER GAIN CONTROL APPLICATIONS INFORMATION BASIC CONNECTIONS ADC DRIVING LAYOUT CONSIDERATIONS EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK EVALUATION BOARD CONFIGURATION OPTIONS Configuration Options for the Main Section Configuration Options for the USB Section OUTLINE DIMENSIONS ORDERING GUIDE
