Datasheet ADL5336 (Analog Devices)
Manufacturer | Analog Devices |
Description | Cascadable IF VGAs with Programmable RMS Detectors |
Pages / Page | 30 / 1 — Cascadable IF VGAs with. Programmable RMS Detectors. Data Sheet. ADL5336. … |
Revision | C |
File Format / Size | PDF / 1.2 Mb |
Document Language | English |
Cascadable IF VGAs with. Programmable RMS Detectors. Data Sheet. ADL5336. FEATURES. FUNCTIONAL BLOCK DIAGRAM
Model Line for this Datasheet
Text Version of Document
Cascadable IF VGAs with Programmable RMS Detectors Data Sheet ADL5336 FEATURES FUNCTIONAL BLOCK DIAGRAM Pair of VGAs with rms AGC detectors COM OPP1 OPM1 IP2A IM2A COM IP2B IM2B VGA and AGC modes of operation Continuous gain control range: 48 dB VCM1 VCM2 Noise figure = 6.8 dB at maximum gain VPOS VGA2 VPOS IMD3 >62 dBc for 1.0 V p-p composite output VGA1 Differential input and output INP1 OPP2 Multiplexed inputs for VGA2 INM1 OPM2 Programmable detector AGC setpoints Programmable VGA maximum gain VPOS X2 X2 VPOS ADL5336 Power-down feature COM COM Single 5 V supply operation MODE SDO APPLICATIONS SPI ENBL DATA Point-to-multipoint radios
1
Instrumentation
00 0- 55
Medical
09
GAIN1 DTO1 GAIN2 DTO2 COMD VPSD LE CLK
Figure 1.
GENERAL DESCRIPTION
The ADL5336 consists of a pair of variable gain amplifiers (VGAs) When driven from a 200 Ω source or from a 50 Ω source through designed for cascaded IF applications. The amplifiers have linear- a 1:4 balun, the noise figure (NF) for the composite amplifier is in-dB gain control and operate from low frequencies to 1 GHz. 6.8 dB at maximum gain. The output of each VGA can drive Their excellent gain conformance over the control range and 100 Ω loads to 5 V p-p maximum. flatness over frequency are due to Analog Devices, Inc., patented Each VGA has an independent square law detector for autonomous, X-AMP® architecture, an innovative technique for implementing automatic gain control (AGC) operation. Each detector setpoint high performance variable gain control. can be programmed independently through the SPI from −24 dBV Each VGA has 24 dB of gain control range. Their maximum gain to −3 dBV in 3 dB steps. When both VGAs are arranged in AGC can be independently programmable over a 6 dB range via the mode and are programmed to the same setpoint, the composite NF SPI. The VGAs can be cascaded to provide a total range of 48 dB. increases to 9 dB when backed off by 18 dB from maximum gain. When connected to a 50 Ω source through a 1:4 balun, the gain The ADL5336 operates from a 5 V supply and consumes a typical is 6 dB higher. The second VGA has an SPI programmable input supply current of 80 mA. When disabled, it consumes 4 mA. It is switch that selects one of two external inputs. fabricated in an advanced silicon-germanium BiCMOS process and is available in a 32-lead exposed paddle LFCSP package. Performance is specified over a −40°C to +85°C temperature range.
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2011–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT DESCRIPTION GAIN CONTROL INTERFACE INPUT AND OUTPUT IMPEDANCES AGC OPERATION REGISTER MAP AND CODES APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DETECTOR OUTPUT AND GAIN PIN COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS MODE AND ENABLE CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) EFFECT OF CAGC ON EVM AGC INSENSITIVITY TO MODULATION TYPE EFFECT OF SETPOINT ON EVM CASCADED VGA/AGC PERFORMANCE EVALUATION BOARD LAYOUT BILL OF MATERIALS (BOM) EVALUATION BOARD CONTROL SOFTWARE OUTLINE DIMENSIONS ORDERING GUIDE