Datasheet LT8607, LT8607B (Analog Devices) - 8

LT8607/LT8607B
PIN FUNCTIONS BST:
This pin is used to provide a drive voltage, higher
TR/SS (MSOP Only):
Output Tracking and Soft-Start Pin. than the input voltage, to the topside power switch. Place This pin allows user control of output voltage ramp rate a 0.1µF boost capacitor as close as possible to the IC. Do during start-up. A TR/SS voltage below 0.778V forces the not place a resistor in series with this pin. LT8607 to regulate the FB pin to equal the TR/SS pin volt-
SW:
The SW pin is the output of the internal power age. When TR/SS is above 0.778V, the tracking function switches. Connect this pin to the inductor and boost is disabled and the internal reference resumes control of capacitor. This node should be kept small on the PCB for the error amplifier. An internal 2µA pull-up current from good performance. INTVCC on this pin allows a capacitor to program out- put voltage slew rate. This pin is pulled to ground with a
INTVCC:
Internal 3.5V Regulator Bypass Pin. The internal 300Ω MOSFET during shutdown and fault conditions; use power drivers and control circuits are powered from this a series resistor if driving from a low impedance output. voltage. INTVCC max output current is 20mA. Voltage on There is no TR/SS pin on the LT8607 or LT8607B DFN INTVCC will vary between 2.8V and 3.5V. Decouple this and the node is internally floated. pin to power ground with at least a 1µF low ESR ceramic capacitor. Do not load the INTV
PG:
The PG pin is the open-drain output of an internal CC pin with external circuitry. comparator. PG remains low until the FB pin is within
RT:
A resistor is tied between RT and ground to set the ±8.5% of the final regulation voltage, and there are no switching frequency. When synchronizing, the RT resistor fault conditions. PG is valid when VIN is above 3.2V and should be chosen to set the LT8607 switching frequency when EN/UV is high. PG is pulled low when VIN is above to equal or below the lowest synchronization input. 3.2V and EN/UV is low. If VIN is near zero, PG will be high
SYNC (MSOP Only):
External Clock Synchronization impedance. Input. Ground this pin for low ripple Burst Mode operation
VIN:
The VIN pin supplies current to the LT8607 internal at low output loads. Tie to a clock source for synchroni- circuitry and to the internal topside power switch. This pin zation to an external frequency. Leave floating for pulse- must be locally bypassed. Be sure to place the positive skipping mode with no spread spectrum modulation. Tie terminal of the input capacitor as close as possible to the to INTVCC or tie to a voltage between 3.2V and 5.0V for VIN pins, and the negative capacitor terminal as close as pulse-skipping mode with spread spectrum modulation. possible to the GND pins. When in pulse-skipping mode, the IQ regulating no load will increase to several mA. There is no SYNC pin on
EN/UV:
The LT8607 is shut down when this pin is low and the LT8607 DFN package. The LT8607 DFN internal y active when this pin is high. The hysteretic threshold volt- ties SYNC to ground. The LT8607B package internal y age is 1.05V going up and 1.00V going down. Tie to VIN floats SYNC. if the shutdown feature is not used. An external resistor divider from VIN can be used to program a VIN threshold
FB:
The LT8607 regulates the FB pin to 0.778V. Connect below which the LT8607 will shut down. the feedback resistor divider tap to this pin.
GND:
Exposed Pad Pin. The exposed pad must be con- nected to the negative terminal of the input capaci- tor and soldered to the PCB in order to lower the thermal resistance. Rev. C 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts